PIC16F688-I/P Microchip Technology, PIC16F688-I/P Datasheet - Page 83

• Manufacturer Part Number: PIC16F688-I/P
• Description: IC PIC MCU FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 19.05 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.2
The BRG is a dedicated 8-bit or 16-bit generator, that
supports both the Asynchronous and Synchronous
modes of the USART. By default, the BRG operates in
8-bit mode; setting the BRG16 bit (BAUDCTL<3>)
selects 16-bit mode.
The SPBRGH:SPBRG register pair controls the period
of a free running timer. In Asynchronous mode, bits
BRGH (TXSTA<2>) and BRG16 also control the baud
rate. In Synchronous mode, bit BRGH is ignored.
Table 10-1 shows the formula for computation of the
baud rate for different USART modes, which only apply
in Master mode (internally generated clock).
Given the desired baud rate and F
integer value for the SPBRGH:SPBRG registers can be
calculated using the formulas in Table 10-1. From this,
the error in baud rate can be determined. An example
calculation is shown in Example 10-1. Typical baud
rates and error values for the various asynchronous
modes are shown in Table 10-2. It may be advanta-
geous to use the high baud rate (BRGH = 1), or the
16-bit BRG to reduce the baud rate error, or achieve a
slow baud rate for a fast oscillator frequency.
Writing a new value to the SPBRGH:SPBRG registers
causes the BRG timer to be reset (or cleared). This
ensures the BRG does not wait for a timer overflow
before outputting the new baud rate.
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit
and make sure that the receive operation is IDLE
before changing the system clock.
TABLE 10-1:
 2004 Microchip Technology Inc.
Legend:
SYNC
0
0
0
0
1
1
USART Baud Rate Generator
(BRG)
x = Don’t care, n = value of SPBRGH:SPBRG register pair
Configuration Bits
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
BRGH
0
1
0
1
x
x
OSC
, the nearest
Preliminary
16-bit/Asynchronous
16-bit/Asynchronous
BRG/USART Mode
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
10.2.1
The data on the RC5/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
EXAMPLE 10-1:
Calculated Baud Rate
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRG:
Note:
Desired Baud Rate
SAMPLING
When BRGH = 1 and BRG16 = 1 then
SPBRGH:SPBRG values
Error
X
OSC
=
=
=
=
=
=
=
=
CALCULATING BAUD
RATE ERROR
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
9615
-------------------------------------------------------------------- -
64 [SPBRGH:SPBRG]
-------------------------------------------- -
Desired Baud Rate
--------------------------------------------- 1
16000000
----------------------- -
----------------------- - 1
-------------------------- -
64 25
----------------------------------
16000000
25.042
9615 9600
of 16 MHz, desired baud rate
9600
PIC16F688
64
Baud Rate Formula
9600
F
–
+
F
F
F
O S C
64
Desired Baud Rate
OSC
OSC
1
OSC
=
–
F
/[64 (n+1)]
/[16 (n+1)]
OS C
25
/[4 (n+1)]
=
–
DS41203B-page 81
0.16%
–
are invalid.
+
1