PIC16F688-I/P Microchip Technology, PIC16F688-I/P Datasheet - Page 24

• Manufacturer Part Number: PIC16F688-I/P
• Description: IC PIC MCU FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 19.05 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F688
3.2
Clock source modes can be classified as external or
internal.
• External clock modes rely on external circuitry for
• Internal clock sources are contained internally
The system clock can be selected between external or
internal clock sources via the System Clock Selection
(SCS) bit (see Section 3.5 “Clock Switching”).
TABLE 3-1:
3.3.2
The External Clock (EC) mode allows an externally
generated logic level as the system clock source.
When operating in this mode, an external clock source
is connected to the OSC1 pin and the RA5 pin is
available for general purpose I/O. Figure 3-2 shows the
pin connections for EC mode.
The Oscillator Start-up Timer (OST) is disabled when
EC mode is selected. Therefore, there is no delay in
operation after a Power-on Reset (POR) or wake-up
from Sleep. Because the PIC16F688 design is fully
static, stopping the external clock input will have the
effect of halting the device while leaving all data intact.
Upon restarting the external clock, the device will
resume operation as if no time had elapsed.
DS41203B-page 22
Note 1:
the clock source. Examples are oscillator modules
(EC mode), quartz crystal resonators or ceramic
resonators (LP, XT and HS modes), and
Resistor-Capacitor (RC mode) circuits.
within the PIC16F688. The PIC16F688 has two
internal oscillators: the 8 MHz High-Frequency
Internal Oscillator (HFINTOSC) and 31 kHz
Low-Frequency Internal Oscillator (LFINTOSC).
LFINTOSC (31 kHz)
LFINTOSC (31 kHz)
Switch From
Clock Source Modes
Sleep/POR
Sleep/POR
Sleep/POR
The 5 s to 10 s start-up delay is based on a 1 MHz system clock.
EC MODE
OSCILLATOR DELAY EXAMPLES
HFINTOSC
HFINTOSC
LFINTOSC
LP, XT, HS
Switch To
EC, RC
EC, RC
Preliminary
125 kHz–8 MHz
31 kHz–20 MHz
125 kHz–8 MHz
DC – 20 MHz
DC – 20 MHz
Frequency
3.3
3.3.1
If the PIC16F688 is configured for LP, XT or HS modes,
the Oscillator Start-up Timer (OST) counts 1024 oscil-
lations from the OSC1 pin, following a Power-on Reset
(POR) and the Power-up Timer (PWRT) has expired (if
configured), or a wake-up from Sleep. During this time,
the program counter does not increment and program
execution is suspended. The OST ensures that the
oscillator circuit, using a quartz crystal resonator or
ceramic resonator, has started and is providing a stable
system clock to the PIC16F688. When switching
between clock sources a delay is required to allow the
new clock to stabilize. These oscillator delays are
shown in Table 3-1.
In order to minimize latency between external oscillator
start-up and code execution, the Two-Speed Clock
Start-up mode can be selected (see Section 3.6
“Two-Speed Clock Start-up Mode”).
FIGURE 3-2:
31 kHz
Clock from
Ext. System
External Clock Modes
OSCILLATOR START-UP TIMER (OST)
RA4
5 s-10 s (approx.) CPU Start-up
EXTERNAL CLOCK (EC)
MODE OPERATION
 2004 Microchip Technology Inc.
1024 Clock Cycles (OST)
Oscillator Delay
OSC1/CLKIN
I/O (OSC2)
1 s (approx.)
PIC16F688
(1)