PIC16F688-I/P Microchip Technology, PIC16F688-I/P Datasheet - Page 72

• Manufacturer Part Number: PIC16F688-I/P
• Description: IC PIC MCU FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 19.05 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F688
8.4
A device Reset forces all registers to their Reset state.
Thus, the A/D module is turned off and any pending
conversion
registers are unchanged.
TABLE 8-2:
DS41203B-page 70
05h/
105h
07h/
107h
0Bh/
8Bh
0Ch
1Eh
1Fh
85h/
185h
87h/
187h
8Ch
91h
9Eh
9Fh
Legend:
Addr
PORTA
PORTC
INTCON
PIR1
ADRESH
ADCON0
TRISA
TRISC
PIE1
ANSEL
ADRESL
ADCON1
Effects of Reset
Name
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for A/D module.
is
Most Significant 8 bits of the left shifted A/D result or 2 bits of the right shifted result
Least Significant 2 bits of the left shifted A/D result or 8 bits of the right shifted result
aborted.
SUMMARY OF A/D REGISTERS
ADFM
ANS7
EEIE
Bit 7
EEIF
GIE
—
—
—
—
—
ADCS2
VCFG
ANS6
PEIE
ADIF
ADIE
The
Bit 6
—
—
—
—
ADRESH:ADRESL
TRISA5
TRISC5
ADCS1
ANS5
RCIF
RCIE
Bit 5
T0IE
RA5
RC5
—
TRISA4
TRISC4
ADCS0
CHS2
ANS4
INTE
C2IE
Bit 4
C2IF
RA4
RC4
Preliminary
TRISA3
TRISC3
CHS1
ANS3
RAIE
Bit 3
C1IF
C1IE
RC3
RA3
—
TRISA2
TRISC2
OSFIF
OSFIE
CHS0
ANS2
Bit 2
T0IF
RA2
RC2
—
GO/DONE
TRISA1
TRISC1
ANS1
INTF
TXIE
Bit 1
TXIF
RA1
RC1
—
TMR1IE
TMR1IF
TRISA0
TRISC0
ADON
ANS0
RAIF
Bit 0
RA0
RC0
 2004 Microchip Technology Inc.
—
--xx xxxx
--xx xxxx
0000 0000
0000 0000
xxxx xxxx
00-0 0000
--11 1111
--11 1111
0000 0000
1111 1111
xxxx xxxx
-000 ----
POR, BOD
Value on:
--uu uuuu
--uu uuuu
0000 0000
0000 0000
uuuu uuuu
00-0 0000
--11 1111
--11 1111
0000 0000
1111 1111
uuuu uuuu
-000 ----
Value on
all other
Resets