PIC16F688-I/P Microchip Technology, PIC16F688-I/P Datasheet - Page 170

• Manufacturer Part Number: PIC16F688-I/P
• Description: IC PIC MCU FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 19.05 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F688
Timer0 Module .................................................................... 45
Timer1
Timer1 Module with Gate Control ....................................... 49
Timing Diagrams
Timing Parameter Symbology........................................... 144
TMR1H Register ................................................................. 49
TMR1L Register .................................................................. 49
TRISA.................................................................................. 31
TRISA Register ................................................................... 32
TRISC Register ................................................................... 43
Two-Speed Clock Start-up Mode ........................................ 27
TXREG................................................................................ 86
TXSTA Register .................................................................. 78
DS41203B-page 168
Associated Registers .................................................. 52
Asynchronous Counter Mode ..................................... 52
External Clock Requirements ................................... 150
Interrupt....................................................................... 50
Modes of Operations................................................... 50
Operation During Sleep .............................................. 52
Oscillator ..................................................................... 52
Prescaler ..................................................................... 50
Timer1 Gate
TMR1H Register ......................................................... 49
TMR1L Register .......................................................... 49
A/D Conversion ......................................................... 154
A/D Conversion (Sleep Mode) .................................. 155
Asynchronous Reception ............................................ 90
Asynchronous Transmission ....................................... 87
Asynchronous Transmission (Back to Back) .............. 87
Auto Wake-up Bit (WUE) During Sleep ...................... 91
Automatic Baud Rate Calculator ................................. 85
Auto-Wake-up Bit (WUE) During Normal Operation ... 91
Brown-out Detect (BOD) ........................................... 148
Brown-out Detect Situations ..................................... 104
CLKOUT and I/O....................................................... 147
Comparator Output ..................................................... 54
External Clock ........................................................... 145
Fail-Safe Clock Monitor (FSCM) ................................. 29
INT Pin Interrupt........................................................ 111
Reset, WDT, OST and Power-up Timer ................... 148
Send Break Character Sequence ............................... 92
Synchronous Reception (Master Mode, SREN) ......... 95
Synchronous Transmission......................................... 93
Synchronous Transmission (Through TXEN) ............. 94
Time-out Sequence................................................... 106
Timer0 and Timer1 External Clock ........................... 150
Timer1 Incrementing Edge.......................................... 50
Two Speed Start-up .................................................... 28
USART Synchronous Receive (Master/Slave) ......... 151
USART Synchronous Transmission (Master/Slave) . 151
Wake-up from Interrupt ............................................. 116
BRGH Bit .................................................................... 81
Reading and Writing ........................................... 52
Inverting Gate ..................................................... 50
Selecting Source........................................... 50, 58
Synchronizing C2OUT w/ Timer1 ....................... 58
Case 3............................................................... 106
Preliminary
U
Ultra Low-Power Wake-up........................................ 6, 31, 34
USART
V
Voltage Reference.
VRCON Register ................................................................ 61
W
Wake-up Using Interrupts ................................................. 115
Watchdog Timer (WDT).................................................... 113
WDTCON Register ....................................................... 9, 114
WPUA Register................................................................... 32
WWW, On-Line Support ....................................................... 3
Asynchronous Mode ................................................... 86
Baud Rate Generator (BRG)
Serial Port Enable (SPEN Bit) .................................... 77
Synchronous Master Mode......................................... 93
Synchronous Slave Mode........................................... 97
See Comparator Voltage Reference (CV
Associated Registers ................................................ 114
Clock Source ............................................................ 113
Modes ....................................................................... 113
Period ....................................................................... 113
Specifications ........................................................... 149
12-bit BreakTransmit and Receive ..................... 92
Associated Registers, Receive........................... 90
Associated Registers, Transmit .......................... 88
Auto Wake-up on SYNC Break .......................... 91
Receiver ............................................................. 89
Setting up 9-bit Mode with Address Detect ........ 89
Auto Baud Rate Detect....................................... 84
Baud Rate Error, Calculating.............................. 81
Baud Rates, Asynchronous Modes .................... 82
Formulas............................................................. 81
High Baud Rate Select (BRGH Bit) .................... 81
Sampling............................................................. 81
Associated Registers, Reception........................ 96
Associated Registers, Transmit .......................... 94
Reception ........................................................... 95
Requirements, Synchronous Receive .............. 151
Requirements, Synchronous Transmission...... 151
Timing Diagram, Synchronous Receive ........... 151
Timing Diagram, Synchronous Transmission... 151
Transmission ...................................................... 93
Associated Registers, Receive........................... 98
Associated Registers, Transmit .......................... 97
Reception ........................................................... 98
Transmission ...................................................... 97
 2004 Microchip Technology Inc.
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