PIC16F688-I/P Microchip Technology, PIC16F688-I/P Datasheet - Page 33

• Manufacturer Part Number: PIC16F688-I/P
• Description: IC PIC MCU FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 3.3 mm
• Length: 19.05 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
4.1
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA. Setting
a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a Hi-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
The exception is RA3, which is input only and its TRISA
bit will always read as ‘1’. Example 4-1 shows how to
initialize PORTA.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the port
data latch. RA3 reads ‘0’ when MCLRE = 1.
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
REGISTER 4-1:
 2004 Microchip Technology Inc.
Note:
Note:
I/O PORTS
PORTA and the TRISA Registers
bit 7-6:
bit 5-0:
Additional information on I/O ports may be
found in the “PICmicro
Family Reference Manual” (DS33023).
The ANSEL (91h) and CMCON0 (19h)
registers must be initialized to configure
an analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
PORTA – PORTA REGISTER (ADDRESS: 05h OR 105h)
bit 7
Unimplemented: Read as ‘0’
PORTA<5:0>: PORTA I/O pins
1 = Port pin is > V
0 = Port pin is < V
Legend:
R = Readable bit
- n = Value at POR
U-0
—
®
Mid-Range MCU
U-0
—
IH
IL
R/W-x
RA5
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-x
RA4
EXAMPLE 4-1:
4.2
Every PORTA pin on the PIC16F688 has an interrupt-
on-change option and a weak pull-up option. PORTA
also provides an Ultra Low-Power Wake-up option. The
next three sections describe these functions.
4.2.1
Each of the PORTA pins, except RA3, has an individu-
ally configurable internal weak pull-up. Control bits
WPUAx enable or disable each pull-up. Refer to
Register 4-3. Each weak pull-up is automatically turned
off when the port pin is configured as an output. The
pull-ups are disabled on a Power-on Reset by the
RAPU bit (Option<7>). A weak pull-up is automatically
enabled for RA3 when configured as MCLR and
_disabled when RA3 is an I/O. There is no software
control of the MCLR pull-up.
BCF
CLRF
MOVLW 07h
MOVWF CMCON0
BSF
CLRF
MOVLW 0Ch
MOVWF TRISA
BCF
Additional Pin Functions
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
STATUS,RP0
PORTA
STATUS,RP0
ANSEL
STATUS,RP0
R/W-x
RA3
WEAK PULL-UPS
INITIALIZING PORTA
R/W-x
RA2
PIC16F688
;Bank 0
;Init PORTA
;Set RA<2:0> to
;digital I/O
;Bank 1
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
;Bank 0
x = Bit is unknown
R/W-0
RA1
DS41203B-page 31
R/W-0
RA0
bit 0