D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 608
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 608 of 809
- Download datasheet (5Mb)
Bits 6 to 3—Ir Clock Select Bits (ICK3 to ICK0)
Bit 2—Output Pulse Width Select (PSEL): PSEL selects an IrDA output pulse width that is 3/16
of the bit length for 115 kbps or 3/16 of the bit length for the selected baud rate.
The Ir clock select bits should be set properly to fix the output pulse width at 3/16 of the bit length
for 115 kbps by setting the PSEL bit to 1.
Bit 6
ICK3
ICK3
Don’t
care
It is necessary to generate a fixed clock pulse, IRCLK, by dividing the P clock by 1/2N + 2 (with
the value of N determined by the setting of ICK3–ICK0).
Example:
P clock: 14.7456 MHz
IRCLK: 921.6 kHz (fixed)
N: Setting of ICK3–ICK0 (0
Accordingly, N is 7.
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): Select the internal baud rate generator clock
source. P , P /4, P /16, or P /64 can be selected by setting the CKS1 and CKS0 bits.
Refer to section 14.2.9, Bit Rate Register (SCBRR), for the relationship between the clock source,
the bit rate register set value, and the baud rate.
Bit 1: CKS1
0
0
1
1
Note: P : Peripheral clock
Rev. 5.00, 09/03, page 562 of 760
N
Bit 5
ICK2
ICK2
Don’t
care
2XIRCLK
Bit 0: CKS0
0
1
0
1
P
Bit 4
ICK1
ICK1
Don’t
care
1
Bit 3
ICK0
ICK0
Don’t
care
N
7
Description
P clock
P /4 clock
P /16
P /64
15)
Bit 2
PSEL
1
0
Pulse width: 3/16 of 115 kbps bit length
Description
Pulse width: 3/16 of bit length
(Initial value)
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