D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 276
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 276 of 809
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Table 10.3 Physical Address Space Map
Area
0
1
2
3
4
5
6
7 *
Notes: 1. Memory with interface such as SRAM or ROM.
Rev. 5.00, 09/03, page 230 of 760
6
2. Use external pin to specify memory bus width.
3. Use register to specify memory bus width.
4. With synchronous DRAM interfaces, bus width must be 16 or 32 bits.
5. With PCMCIA interface, bus width must be 8 or 16 bits.
6. Do not access the reserved area. If the reserved area is accessed, correct operation
7. When the control register in area 1 is not used for address translation by the MMU, set
Connectable Memory
Ordinary memory *
burst ROM
Internal I/O registers *
Ordinary memory *
synchronous DRAM
Ordinary memory *
synchronous DRAM
Ordinary memory *
Ordinary memory *
PCMCIA, burst ROM
Ordinary memory,
burst ROM
Ordinary memory *
PCMCIA, burst ROM
Reserved area
cannot be guaranteed.
the first three bits of the logical address to 101 for allocation to the P2 space.
1
1
1
1
1
1
,
,
,
,
,
7
Physical Address
H'00000000 to H'03FFFFFF
H'00000000 + H'20000000
H'03FFFFFF + H'20000000
H'04000000 to H'07FFFFFF
H'04000000 + H'20000000
H'07FFFFFF + H'20000000
H'08000000 to H'0BFFFFFF
H'08000000 + H'20000000
H'0BFFFFFF + H'20000000
H'0C000000 to H'0FFFFFFF
H'0C000000 + H'20000000
H'0FFFFFFF + H'20000000
H'10000000 to H'13FFFFFF
H'10000000 + H'20000000
H'13FFFFFF + H'20000000
H'14000000 to H'15FFFFFF
H'16000000 to H'17FFFFFF
H'14000000 + H'20000000
H'17FFFFFF + H'20000000
H'18000000 to H'19FFFFFF
H'1A000000 to H'1BFFFFFF
H'18000000 + H'20000000
H'1BFFFFFF + H'20000000
H'1C000000 + H'20000000
to H'1FFFFFFF + H'20000000
n to
n to
n to
n to
n to
n to
n to
n
n
n
n
n
n
n
n
n
64 Mbytes
64 Mbytes
64 Mbytes
32 Mbytes
32 Mbytes
Capacity
Shadow
Shadow
64 Mbytes
Shadow
64 Mbytes
Shadow
Shadow
32 Mbytes
Shadow
Shadow
Access Size
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
8, 16, 32 *
n = 1–6
n = 0–7
2
3
3
3
3
3
3
*
*
*
*
4
4
5
5
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