D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 187
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 187 of 809
- Download datasheet (5Mb)
Bit 3—DEI3 Interrupt Request (DEI3R): Indicates whether a DEI3 (DMAC) interrupt request
has been generated.
Bit 2—DEI2 Interrupt Request (DEI2R): Indicates whether a DEI2 (DMAC) interrupt request
has been generated.
Bit 1—DEI1 Interrupt Request (DEI1R): Indicates whether a DEI1 (DMAC) interrupt request
has been generated.
Bit 0—DEI0 Interrupt Request (DEI0R): Indicates whether a DEI0 (DMAC) interrupt request
has been generated.
6.3.8
IRR2 is an 8-bit read-only register that indicates whether an A/D converter or SCIF interrupt
request has been generated. This register is initialized to H'00 by a power-on reset or manual reset,
but is not initialized in standby mode.
Bit 3: DEI3R
0
1
Bit 2: DEI2R
0
1
Bit 1: DEI1R
0
1
Bit 0: DEI0R
0
1
Initial value:
Interrupt Request Register 2 (IRR2)
R/W:
Bit:
Description
DEI3 interrupt request not generated
DEI3 interrupt request generated
Description
DEI2 interrupt request not generated
DEI2 interrupt request generated
Description
DEI1 interrupt request not generated
DEI1 interrupt request generated
Description
DEI0 interrupt request not generated
DEI0 interrupt request generated
—
R
7
0
—
R
6
0
—
R
5
0
ADIR
R
4
0
TXI2R
R
3
0
Rev. 5.00, 09/03, page 141 of 760
BRI2R
R
2
0
RXI2R
R
1
0
(Initial value)
(Initial value)
(Initial value)
(Initial value)
ERI2R
R
0
0
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