HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 600

• Manufacturer Part Number: HD64F3437TFI16V
• Description: MCU FLASH 60K 100-TQFP
• Manufacturer: Renesas Electronics America

Specifications of HD64F3437TFI16V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 23.8 Bus Timing
Condition A: V
Condition B: V
Condition C: V
Item
Clock cycle time
Clock pulse width low
Clock pulse width high
Clock rise time
Clock fall time
Address delay time
Address hold time
Address strobe delay time t
Write strobe delay time
Strobe delay time
Write strobe pulse width
Address setup time 1
Address setup time 2
Read data setup time
Read data hold time
Read data access time
Write data delay time
Write data setup time
Write data hold time
Wait setup time
Wait hold time
Notes: *1 Values at maximum operating frequency
568
*2 H8/3437 F-ZTAT version/other products
*3 In the F-ZTAT LH version, V
operating frequency, Ta = –20 to +75˚C (regular specifications), Ta = –40 to +85˚C
(wide-range specifications)
operating frequency, Ta = –20 to +75˚C (regular specifications), Ta = –40 to +85˚C
(wide-range specifications)
maximum operating frequency, Ta = –20 to +75˚C
CC
CC
CC
* 1
* 1
* 1
= 5.0 V 10%, V
= 4.0 V to 5.5 V, V
= 2.7 V to 5.5 V
* 1
* 1
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
cyc
CL
CH
Cr
Cf
AD
AH
ASD
WSD
SD
WSW
AS1
AS2
RDS
RDH
ACC
WDD
WDS
WDH
WTS
WTH
Min
100
30
30
—
—
—
20
—
—
—
110
15
65
35
0
—
—
0/5
20
40
10
*3
Condition C
CC
, V
*2
10 MHz
B = 5.0 V 10%, V
CC
CC
CC
B = 4.0 V to 5.5 V, V
Max
500
—
—
20
20
50
—
50
50
50
—
—
—
—
—
170
80/75
—
—
—
—
= 3.0 V to 5.5 V, V
B = 2.7 V to 5.5 V
*2
Min
83.3
30
30
—
—
—
15
—
—
—
90
10
50
20
0
—
—
0/5
20
35
10
Condition B
*2
12 MHz
Max
500
—
—
10
10
35
—
35
35
35
—
—
—
—
—
160
65/60
—
—
—
—
SS
CC
= 0 V, ø = 2.0 MHz to maximum
*3
B = 3.0 V to 5.5 V
SS
, V
*2
= 0 V, ø = 2.0 MHz to maximum
SS
Min
62.5
20
20
—
—
—
10
—
—
—
60
10
40
20
0
—
—
0/5
20
30
10
= 0 V, ø = 2.0 MHz to
Condition A
*2
16 MHz
Max
500
—
—
10
10
30
—
30
30
30
—
—
—
—
—
110
60
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test
Conditions
Fig. 23.7
Fig. 23.8