HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 349

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HD64F3437TFI16V

Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F3437TFI16V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14.1
The H8/3437 Series has an on-chip host interface (HIF) that provides a dual-channel parallel
interface between the on-chip CPU and a host processor. The host interface is available only when
the HIE bit is set to 1 in SYSCR. This mode is called slave mode, because it is designed for a
master-slave communication system in which the H8/3437-Series chip is slaved to a host
processor.
The host interface consists of four 1-byte data registers, two 1-byte status registers, a 1-byte
control register, fast A
out via five control signals from the host processor (CS
EIOW), four output signals to the host processor (GA
bit bidirectional command/data bus (HDB
ECS
Note: If one of the two interface channels will not be used, tie the unused CS pin to V
2
) signals select one of the two interface channels.
example, if interface channel 1 (IDR1, ODR1, STR1) is not used, tie CS
Overview
20
gate logic, and a host interrupt request circuit. Communication is carried
Section 14 Host Interface
7
to HDB
0
, or XDB
20
, HIRQ
1
, CS
2
7
or ECS
1
to XDB
, HIRQ
2
, HA
0
11
). The CS
, and HIRQ
0
, IOR, and IOW or
1
1
to V
and CS
12
), and an 8-
CC
CC
.
2
. For
(or
317

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