HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 481

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HD64F3437TFI16V

Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F3437TFI16V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Boot-Mode Execution Procedure: Figure 20.4 shows the boot-mode execution procedure.
10
1
2
3
4
5
6
7
8
9
After checking that all data in flash memory is H'FF,
H8/3437F branches to H'F7E0 in RAM area and
executes user program downloaded into RAM
H8/3437F transmits one H'AA data byte to host
After completing bit-rate alignment, H8/3437F
completion of bit-rate alignment, is received
H8/3437F transmits one H'AA data byte to host
H8/3437F receives two bytes indicating byte
After receiving H'55, H8/3437F sends part of
sends one H'00 data byte to host to indicate
area (H'F800 to H'FF2F), then checks the
After transferring the user program to RAM,
H8/3437F calculates number of bytes left
Program H8/3437F pins for boot mode,
length (N) of program to be downloaded
Host transmits H'00 data continuously
normally, then transmits one H'55 byte
H8/3437F transfers one user program
data in the user area of flash memory
H8/3437F branches to the RAM boot
Host checks that this byte, indicating
of H'00 data transmitted from host
H8/3437F computes bit rate and
H8/3437F measures low period
to be transferred (N = N – 1)
that alignment is completed
the boot program to RAM
All bytes transferred?
sets bit rate register
All data = H'FF?
to on-chip RAM
at desired bit rate
byte to RAM
and reset
(N = 0?)
Start
Yes
Yes
*
2
*
*
1
4
memory blocks
Figure 20.4 Boot Mode Flowchart
Erase all flash
No
No
*
3,
*
4
1. Program the H8/3437F pins for boot mode, and start the
2. Set the host’s data format to 8 bits + 1 stop bit, select the
3. The H8/3437F repeatedly measures the low period of the
4. When SCI bit-rate alignment is completed, the H8/3437F
5. The host should receive the byte transmitted from the
6. After receiving H'55, H8/3437F sends part of the boot
7. After branching to the boot program area (H'F800 to
8. After the H8/3437F transmits one H'AA data byte, the host
9. The H8/3437F stores the received user program in on-chip
10. After transmitting one H'AA data byte, the H8/3437F
Notes: *1 The user can use 1934 bytes of RAM. The number
H8/3437F from a reset.
desired bit rate (2400, 4800, or 9600 bps), and transmit
H'00 data continuously.
RxD1 pin and calculates the host’s asynchronous-
communication bit rate.
transmits one H'00 data byte to indicate completion of
alignment.
H8/3437F to indicate that bit-rate alignment is completed,
check that this byte is received normally, then transmit one
H'55 byte.
program to H'F780 to H'F7DF and H'F800 to H'FF2F of
RAM.
H'FF2F) in RAM, the H8/3437F checks whether the flash
memory already contains any programmed data. If so, all
blocks are erased.
transmits the byte length of the user program to be
transferred to the H8/3437F. The byte length must be sent
as two-byte data, upper byte first and lower byte second.
After that, the host proceeds to transmit the user program.
As verification, the H8/3437F echoes each byte of the
received byte-length data and user program back to the
host.
RAM in a 1934-byte area from H'F7E0 to H'FF6D.
branches to address H'F7E0 in on-chip RAM and executes
the user program stored in the area from H'F7E0 to
H'FF6D.
*2 The part of the user program that controls the flash
*3 If a memory cell malfunctions and cannot be
*4 H'0000 to H'EF7F in mode 2 and H'0000 to H'F77F
of bytes transferred must not exceed 1934 bytes.
Be sure to transmit the byte length in two bytes,
upper byte first and lower byte second. For
example, if the byte length of the program to be
transferred is 256 bytes (H'0100), transmit H'01 as
the upper byte, followed by H'00 as the lower byte.
memory should be coded according to the flash
memory write/erase algorithms given later.
erased, the H8/3437F transmits one H'FF byte to
report an erase error, halts erasing, and halts
further operations.
in mode 3.
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