MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 475

IC MCU 64K FLASH EEPROM 80-TQFP

MC9S12NE64VTUE

Manufacturer Part Number
MC9S12NE64VTUE
Description
IC MCU 64K FLASH EEPROM 80-TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Processor Series
S12N
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12NE64E, DEMO9S12NE64E
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Total Internal Ram Size
8KB
# I/os (max)
70
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.625/3.465V
Operating Supply Voltage (min)
2.357/2.375/3.135V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1
2
Freescale Semiconductor
The DBG module is designed for backwards compatibility to existing BKP modules. Register and bit names have changed from
the BKP module. This column shows the DBG register name, as well as the BKP register name for reference.
Comparator C can be used to enhance the BKP mode by providing a third breakpoint.
DBGCCX
DBGCCH
DBGCCL
DBGTBH
DBGCNT
DBGCAX
DBGCAH
DBGCBX
DBGCBH
DBGCAL
DBGCBL
DBGTBL
BKPCT0
BKPCT1
DBGC2
DBGC3
BKP0H
BKP1H
Name
BKP0X
BKP0L
BKP1X
BKP1L
1
(2)
(2)
(2)
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
BKAMBH
BKABEN
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
TBF
PAGSEL
PAGSEL
PAGSEL
Figure 18-3. DBG Register Summary (continued)
= Unimplemented or Reserved
BKAMBL
Bit 14
FULL
Bit 6
14
14
14
6
0
6
6
6
MC9S12NE64 Data Sheet, Rev. 1.1
BKBMBH
Bit 13
BDM
Bit 5
13
13
13
5
5
5
5
BKBMBL
TAGAB
Bit 12
Bit 4
12
12
12
4
4
4
4
RWAEN
BKCEN
Bit 11
Bit 3
11
11
11
3
3
3
3
EXTCMP
EXTCMP
EXTCMP
CNT
Memory Map and Register Definition
TAGC
Bit 10
RWA
Bit 2
10
10
10
2
2
2
2
RWCEN
RWBEN
Bit 9
Bit 1
1
9
1
9
1
9
1
RWC
RWB
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
475

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