MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 210

• Manufacturer Part Number: MC9S12NE64VTUE
• Description: IC MCU 64K FLASH EEPROM 80-TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Processor Series: S12N
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12NE64E, DEMO9S12NE64E
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.625/3.465V
• Operating Supply Voltage (min): 2.357/2.375/3.135V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 7 Analog-to-Digital Converter (ATD10B8CV3)
210
Note: The read portion of the right justified result data registers has been divided to show the bit position when reading 10-bit
ATDDR4H
ATDDR0H
ATDDR3L
ATDDR4L
ATDD45H
ATDD46H
ATDDR6L
ATDD47H
ATDDR0L
ATDD45L
ATDD47L
Register
Name
and 8-bit conversion data. For more detailed information refer to
(ATDDRx)”.
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT
10-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
W
W
W
W
W
W
W
W
W
W
W
BIT 7 MSB
BIT 7 MSB
BIT 7 MSB
BIT 7 MSB
BIT 7 MSB
BIT 1
BIT 1
BIT 1
BIT 1
BIT 1
BIT 7
Bit 7
U
U
U
U
U
0
0
Figure 7-2. ATD Register Summary (Sheet 3 of 5)
= Unimplemented or Reserved
BIT 0
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
BIT 0
BIT 6
BIT 6
U
U
U
U
U
6
0
0
MC9S12NE64 Data Sheet, Rev. 1.1
Right Justified Result Data
BIT 7
BIT 5
BIT 7
BIT 5
BIT 7
BIT 5
BIT 7
BIT 5
BIT 5
BIT 5
5
0
0
0
0
0
0
0
0
0
0
0
0
BIT 6
BIT 4
BIT 6
BIT 4
BIT 6
BIT 4
BIT 6
BIT 4
BIT 4
BIT 4
4
0
0
0
0
0
0
0
0
0
0
0
0
Section 7.3.2.13, “ATD Conversion Result Registers
BIT 5
BIT 3
BIT 5
BIT 3
BIT 5
BIT 3
BIT 5
BIT 3
BIT 3
BIT 3
3
0
0
0
0
0
0
0
0
0
0
0
0
BIT 4
BIT 2
BIT 4
BIT 2
BIT 4
BIT 2
BIT 4
BIT 2
BIT 2
BIT 2
2
0
0
0
0
0
0
0
0
0
0
0
0
Freescale Semiconductor
BIT 9 MSB
BIT 3
BIT 1
BIT 3
BIT 1
BIT 3
BIT 1
BIT 3
BIT 1
BIT 1
BIT 1
1
0
0
0
0
0
0
0
0
0
0
0
BIT 2
BIT 0
BIT 2
BIT 0
BIT 2
BIT 0
BIT 2
BIT 0
BIT 8
BIT 0
BIT 0
Bit 0
0
0
0
0
0
0
0
0
0
0
0