MC9S12NE64VTUE Freescale Semiconductor, MC9S12NE64VTUE Datasheet - Page 232

IC MCU 64K FLASH EEPROM 80-TQFP

MC9S12NE64VTUE

Manufacturer Part Number
MC9S12NE64VTUE
Description
IC MCU 64K FLASH EEPROM 80-TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Processor Series
S12N
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12NE64E, DEMO9S12NE64E
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Total Internal Ram Size
8KB
# I/os (max)
70
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.625/3.465V
Operating Supply Voltage (min)
2.357/2.375/3.135V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 8 Serial Communication Interface (SCIV3)
8.2
The SCI module has a total of two external pins.
8.2.1
The TXD pin transmits SCI (standard or infrared) data. It will idle high in either mode and is high
impedance anytime the transmitter is disabled.
8.2.2
The RXD pin receives SCI (standard or infrared) data. An idle line is detected as a line high. This input is
ignored when the receiver is disabled and should be terminated to a known voltage.
8.3
This subsection provides a detailed description of all the SCI registers.
8.3.1
The memory map for the SCI module is given in
address offset. The total address for each register is the sum of the base address for the SCI module and
the address offset for each register.
8.3.2
This subsection consists of register descriptions in address order. Each description includes a standard
register diagram with an associated figure number. Writes to reserved register locations do not have any
effect and reads of these locations return a 0. Details of register bit and field function follow the register
diagrams, in bit order.
232
Register
SCIBDH
SCIBDL
SCICR1
Name
External Signal Descriptions
Memory Map and Register Definition
TXD — SCI Transmit Pin
RXD — SCI Receive Pin
Module Memory Map
Register Descriptions
W
W
W
R
R
R
LOOPS
SBR7
IREN
Bit 7
SCISWAI
= Unimplemented or Reserved
Figure 8-2. SCI Registers Summary
SBR6
TNP1
6
MC9S12NE64 Data Sheet, Rev. 1.1
RSRC
TNP0
SBR5
5
Figure
SBR12
SBR4
M
4
8-2. The address listed for each register is the
SBR11
WAKE
SBR3
3
SBR10
SBR2
ILT
2
Freescale Semiconductor
SBR9
SBR1
PE
1
SBR8
SBR0
Bit 0
PT

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