ZLF645E0Q2064G Zilog, ZLF645E0Q2064G Datasheet - Page 54

• Manufacturer Part Number: ZLF645E0Q2064G
• Description: IC MCU 64K FLASH 1K RAM 20-QFN
• Manufacturer: Zilog
• Series: Crimzon™ ZLFr

Specifications of ZLF645E0Q2064G

• Core Processor: Z8 LXMC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, WDT
• Number Of I /o: 16
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.9 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Oscillator Type: -
• Other names: 269-4723

PS026407-0408
Note:
Example
For example, the following code uses linear addressing for the source of a register transfer
operation and uses a working register address for the target:
The LDE and LDEI instructions that existed in the Z8 CPU are no longer valid; they have
been replaced by the LDX and LDXI instructions.
SRP #%23
LD R0, #%55
SRP #%12
LD R6, #%03
LD R7, #%20
LD R0, @RR6
In the above code, the source register is referred through a linear address value contained
within registers R6 and R7, whereas the destination is referenced via the SRP setting and a
working register. For more information about instructions on the usage of LDX and LDXI
instructions, refer to Z8
;Set working register group 2 in bank 3
;Load 55 into working register R0 in the current
;group and bank (linear address 320h)
;Set working register group 1 in bank 2
;Load high byte of source linear address (0320h)
;Load low byte of source linear address (0320h)
;Load linear address 320h contents (55h) into
;working register R0 in the current group and
;bank (linear address 210h)
®
LXMC CPU Core User Manual (UM0215).
ZLF645 Series Flash MCUs
Product Specification
Register File
46