AT89C51RE2-SLSUM Atmel, AT89C51RE2-SLSUM Datasheet - Page 144

MCU 8BIT FLASH 2.7-5.5V 44-PLCC

AT89C51RE2-SLSUM

Manufacturer Part Number
AT89C51RE2-SLSUM
Description
MCU 8BIT FLASH 2.7-5.5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RE2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/TWI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
8 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89OCD-01
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
8KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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AT89C51RE2-SLSUM
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Figure 55. Format and State in the Slave Transmitter Mode
Table 105. Status in Slave Transmitter Mode
144
(SSCS)
Status
Code
A8h
B0h
B8h
Reception of the
own slave address
and one or more
data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (AA=0)
AT89C51RE2
Status of the 2-wire bus and
Arbitration lost in SLA+R/W as
master; own SLA+R has been
Data byte in SSDAT has been
transmitted; NOT ACK has
received; ACK has been
received; ACK has been
Own SLA+R has been
2-wire hardware
From master to slave
From slave to master
been received
returned
returned
S
SLA
Load data byte or
Load data byte or
Load data byte or
To/from SSDAT
Load data byte
Load data byte
Load data byte
Application Software Response
R
Data
n
B0h
A8h
A
A
STA
X
X
X
X
X
X
A
To SSCON
STO
Data
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
0
0
0
0
0
0
SI
0
0
0
0
0
0
B8h
A
AA
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Data
C8h
C0h
A
A
All 1’s
P or S
P or S
7663D–8051–10/08

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