AT89C51RE2-SLSUM Atmel, AT89C51RE2-SLSUM Datasheet - Page 127

• Manufacturer Part Number: AT89C51RE2-SLSUM
• Description: MCU 8BIT FLASH 2.7-5.5V 44-PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RE2-SLSUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Package: 44PLCC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: SPI/TWI/UART
• Number Of Timers: 3
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89OCD-01
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Keyboard
Interface
Interrupt
Power Reduction
Mode
7663E–8051–10/08
The AT89C51RE2 implements a keyboard interface allowing the connection of a
8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on both
high or low level. These inputs are available as alternate function of P1 and allow to exit from
idle and power down modes.
The keyboard interface interfaces with the C51 core through 3 special function registers: KBLS,
the Keyboard Level Selection register (Table 97), KBE, The Keyboard interrupt Enable register
(Table 96), and KBF, the Keyboard Flag register (Table 95).
The keyboard inputs are considered as 8 independent interrupt sources sharing the same inter-
rupt vector. An interrupt enable bit (KBD in IE1) allows global enable or disable of the keyboard
interrupt (see Figure 47). As detailed in Figure 48 each keyboard input has the capability to
detect a programmable level according to KBLS. x bit value. Level detection is then reported in
interrupt flags KBF. x that can be masked by software using KBE. x bits.
This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allow usage of P1
inputs for other purpose.
Figure 47. Keyboard Interface Block Diagram
Figure 48. Keyboard Input Circuitry
P1 inputs allow exit from idle and power down modes as detailed in Section “Power Manage-
ment”, page 118.
P1:x
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Vcc
Internal Pullup
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
KBLS. x
0
1
KBF. x
KBE. x
KBD
IE1
AT89C51RE2
Keyboard Interface
Interrupt Request
KBDIT
127