PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 317

• Manufacturer Part Number: PIC18F2450-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2450-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/USB
• Maximum Clock Frequency: 48 MHZ
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 10
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

T
T0CON Register
Table Pointer Operations (table) ........................................ 76
Table Reads/Table Writes ................................................. 56
TBLRD ............................................................................. 251
TBLWT ............................................................................. 252
Time-out in Various Situations (table) ................................ 45
Time-out Sequence ............................................................ 45
Timer0 .............................................................................. 111
Timer1 .............................................................................. 115
Timer2 .............................................................................. 121
Timing Diagrams
© 2007 Microchip Technology Inc.
PSA Bit ..................................................................... 113
T0CS Bit ................................................................... 112
T0PS2:T0PS0 Bits ................................................... 113
T0SE Bit ................................................................... 112
16-Bit Mode Timer Reads and Writes ...................... 112
Associated Registers ............................................... 113
Clock Source Edge Select (T0SE Bit) ...................... 112
Clock Source Select (T0CS Bit) ............................... 112
Operation ................................................................. 112
Overflow Interrupt .................................................... 113
Prescaler .................................................................. 113
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode ........................................... 117
Associated Registers ....................................... 120, 126
Interrupt .................................................................... 118
Operation ................................................................. 116
Oscillator .......................................................... 115, 117
Overflow Interrupt .................................................... 115
Resetting, Using a Special Event Trigger
TMR1H Register ...................................................... 115
TMR1L Register ....................................................... 115
Use as a Real-Time Clock ....................................... 118
Associated Registers ............................................... 122
Interrupt .................................................................... 122
Operation ................................................................. 121
Output ...................................................................... 122
PR2 Register ............................................................ 127
TMR2 to PR2 Match Interrupt .................................. 127
A/D Conversion ........................................................ 293
Asynchronous Reception ......................................... 166
Asynchronous Transmission .................................... 164
Asynchronous Transmission (Back-to-Back) ........... 164
Automatic Baud Rate Calculation ............................ 162
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep ................... 167
BRG Overflow Sequence ......................................... 162
Brown-out Reset (BOR) ........................................... 288
Capture/Compare/PWM (CCP) ................................ 290
CLKO and I/O .......................................................... 287
Clock/Instruction Cycle .............................................. 57
EUSART Synchronous Receive (Master/Slave) ...... 291
EUSART Synchronous Transmission
External Clock (All Modes Except PLL) ................... 285
Switching Assignment ...................................... 113
Layout Considerations ..................................... 118
Low-Power Option ........................................... 117
Using Timer1 as a Clock Source ..................... 117
Output (CCP) ................................................... 118
Normal Operation ............................................ 167
(Master/Slave) ................................................. 291
Preliminary
Timing Diagrams and Specifications ............................... 285
Top-of-Stack Access .......................................................... 54
TQFP Packages and Special Features ........................... 211
TSTFSZ ........................................................................... 253
Two-Speed Start-up ................................................. 191, 205
Two-Word Instructions
TXSTA Register
Fail-Safe Clock Monitor ........................................... 207
High/Low-Voltage Detect Characteristics ................ 282
High-Voltage Detect (VDIRMAG = 1) ...................... 188
Low-Voltage Detect (VDIRMAG = 0) ....................... 187
PWM Output ............................................................ 127
Reset, Watchdog Timer (WDT), Oscillator Start-up
Send Break Character Sequence ............................ 168
Slow Rise Time (MCLR Tied to V
Synchronous Reception
Synchronous Transmission ..................................... 169
Synchronous Transmission (Through TXEN) .......... 170
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 289
Transition for Entry to Idle Mode ............................... 38
Transition for Entry to SEC_RUN Mode .................... 35
Transition for Entry to Sleep Mode ............................ 37
Transition for Two-Speed Start-up
Transition for Wake From Idle to Run Mode .............. 38
Transition for Wake From Sleep (HSPLL) ................. 37
Transition From RC_RUN Mode to
Transition From SEC_RUN Mode to
Transition to RC_RUN Mode ..................................... 36
USB Signal .............................................................. 292
Capture/Compare/PWM
CLKO and I/O Requirements ................................... 287
EUSART Synchronous Receive Requirements ....... 291
EUSART Synchronous Transmission
External Clock Requirements .................................. 285
PLL Clock ................................................................ 286
Reset, Watchdog Timer, Oscillator Start-up Timer,
Timer0 and Timer1 External Clock
USB Full-Speed Requirements ............................... 292
USB Low-Speed Requirements ............................... 292
Example Cases ......................................................... 58
BRGH Bit ................................................................. 157
Timer (OST) and Power-up Timer (PWRT) ..... 288
V
(Master Mode, SREN) ..................................... 171
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
(INTRC to HSPLL) ........................................... 205
PRI_RUN Mode ................................................. 36
PRI_RUN Mode (HSPLL) .................................. 35
Requirements (CCP) ....................................... 290
Requirements .................................................. 291
Power-up Timer and Brown-out Reset
Requirements .................................................. 288
Requirements .................................................. 289
PIC18F2450/4450
(MCLR Tied to V
DD
Rise > T
PWRT
DD
DD
) ............................................ 47
, V
) ......................................... 47
DD
DD
DD
), Case 1 ...................... 46
), Case 2 ...................... 46
Rise Tpwrt) ................ 46
DD
DS39760C-page 315
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