PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 210

IC PIC MCU FLASH 8KX16 28SOIC

PIC18F2450-I/SO

Manufacturer Part Number
PIC18F2450-I/SO
Description
IC PIC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2450-I/SO

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/USB
Maximum Clock Frequency
48 MHZ
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
A/d Bit Size
10 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2450-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2450/4450
18.5
The overall structure of the code protection on the
PIC18 Flash devices differs significantly from other
PIC
The user program memory is divided into three blocks.
One of these is a boot block of 1 or 2 Kbytes. The
remainder of the memory is divided into two blocks on
binary boundaries.
FIGURE 18-5:
TABLE 18-3:
DS39760C-page 208
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
Legend: Shaded cells are unimplemented.
®
microcontrollers.
File Name
Program Verification and
Code Protection
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
SUMMARY OF CODE PROTECTION REGISTERS
MEMORY SIZE/DEVICE
CODE-PROTECTED PROGRAM MEMORY FOR PIC18F2450/4450
(PIC18F2450/4450)
Unimplemented
Unimplemented
Unimplemented
16 Kbytes
Boot Block
Read ‘0’s
Read ‘0’s
Read ‘0’s
Block 0
Block 1
Bit 7
EBTRB
WRTB
Bit 6
CPB
Preliminary
000000h
0007FFh
000FFFh
001000h
001FFFh
002000h
003FFFh
1FFFFFh
Address
WRTC
Range
Bit 5
Each of the three blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
Figure 18-5 shows the program memory organization
for 24 and 32-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 18-3.
Bit 4
(Unimplemented Memory Space)
Block Code Protection
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
Bit 3
Controlled By:
Bit 2
© 2007 Microchip Technology Inc.
EBTR1
WRT1
Bit 1
CP1
EBTR0
WRT0
Bit 0
CP0

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