PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 189

• Manufacturer Part Number: PIC18F2450-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2450-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/USB
• Maximum Clock Frequency: 48 MHZ
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 10
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.2
The following steps are needed to set up the HLVD
module:
1.
2.
3.
4.
5.
6.
17.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and will consume static
current. The total current consumption, when enabled,
is specified in electrical specification parameter D022
(Section 270 “DC Characteristics”).
FIGURE 17-2:
© 2007 Microchip Technology Inc.
Disable the module by clearing the HLVDEN bit
(HLVDCON<4>).
Write the value to the HLVDL3:HLVDL0 bits that
selects the desired HLVD trip point.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD Interrupt Flag, HLVDIF
(PIR2<2>), which may have been set from a
previous interrupt.
Enable the HLVD interrupt, if interrupts are
desired, by setting the HLVDIE and GIE/GIEH
bits (PIE2<2> and INTCON<7>). An interrupt
will not be generated until the IRVST bit is set.
CASE 1:
CASE 2:
Enable HLVD
HLVD Setup
Current Consumption
Enable HLVD
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
LOW-VOLTAGE DETECT OPERATION (VDIRMAG =
Internal Reference is stable
Internal Reference is stable
Preliminary
T
T
IRVST
IRVST
HLVDIF may not be set
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
Depending on the application, the HLVD module does
not need to be operating constantly. To decrease the
current requirements, the HLVD circuitry may only
need to be enabled for short periods where the voltage
is checked. After doing the check, the HLVD module
may be disabled.
17.4
The internal reference voltage of the HLVD module,
specified in electrical specification parameter D420 (see
Table 21-4 in Section 21.0 “Electrical Characteris-
tics”), may be used by other internal circuitry, such as
the Programmable Brown-out Reset. If the HLVD or
other circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low or high-voltage condition can be reliably detected.
This start-up time, T
independent of device clock speed. It is specified in
electrical specification parameter 36 (Table 21-10).
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval. Refer to Figure 17-2
or Figure 17-3.
HLVD Start-up Time
PIC18F2450/4450
HLVDIF cleared in software
0
)
IRVST
HLVDIF cleared in software
, is an interval that is
V
V
DS39760C-page 187
HLVD
HLVD
IRVST
has