PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 214

• Manufacturer Part Number: PIC18F2450-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2450-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/USB
• Maximum Clock Frequency: 48 MHZ
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 10
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2450/4450
Even when the dedicated port is enabled, the ICSP and
ICD functions remain available through the legacy port.
When V
of the ICRST/ICV
18.9.2
PIC18F4450 devices in 44-pin TQFP packages also
have the ability to change their configuration under
external control for debugging purposes. This allows
the device to behave as if it were a PIC18F2455/2550
28-pin device.
This 28-pin Configuration mode is controlled through a
single pin, NC/ICPORTS. Connecting this pin to V
forces the device to function as a 28-pin device.
Features normally associated with the 40/44-pin
devices are disabled, along with their corresponding
control registers and bits. On the other hand,
connecting the pin to V
in its default configuration.
The configuration option is only available when
background debugging and the dedicated ICD/ICSP
port are both enabled (DEBUG Configuration bit is
clear and ICPRT Configuration bit is set). When
disabled, NC/ICPORTS is a No Connect pin.
18.10 Single-Supply ICSP Programming
The LVP Configuration bit enables Single-Supply
ICSP Programming (formerly known as Low-Voltage
ICSP Programming or LVP). When Single-Supply
Programming is enabled, the microcontroller can be
programmed without requiring high voltage being
applied to the MCLR/V
PGM pin is then dedicated to controlling Program
mode entry and is not available as a general purpose
I/O pin.
While programming using Single-Supply Program-
ming, V
normal execution mode. To enter Programming mode,
V
DS39760C-page 212
DD
Note 1: The ICPRT Configuration bit can only be
is applied to the PGM pin.
DD
IH
2: The ICPRT Configuration bit must be
is seen on the MCLR/V
is applied to the MCLR/V
28-PIN EMULATION
programmed through the default ICSP
port.
maintained clear for all 28-pin and 40-pin
devices; otherwise, unexpected operation
may occur.
PP
pin is ignored.
DD
PP
/RE3 pin, but the RB5/KBI1/
forces the device to function
PP
/RE3 pin, the state
PP
/RE3 pin as in
Preliminary
SS
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RB5/KBI1/PGM then
becomes available as the digital I/O pin, RB5. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a Block Erase, or erased row by row, then written
at any specified V
erased, a Block Erase is required. If a Block Erase is to
be performed when using Low-Voltage Programming,
the device must be supplied with V
PP
Note 1: High-Voltage Programming is always
/RE3 pin). Once LVP has been disabled, only the
2: While in Low-Voltage ICSP Programming
3: When using Low-Voltage ICSP Program-
4: If the device Master Clear is disabled,
available, regardless of the state of the
LVP bit, by applying V
mode, the RB5 pin can no longer be used
as a general purpose I/O pin and should
be held low during normal operation.
ming (LVP) and the pull-ups on PORTB
are enabled, bit 5 in the TRISB register
must be cleared to disable the pull-up on
RB5 and ensure the proper operation of
the device.
verify that either of the following is done to
ensure proper entry into ICSP mode:
a) disable Low-Voltage Programming
b) make certain that RB5/KBI1/PGM
(CONFIG4L<2> = 0); or
is held low during entry into ICSP.
DD
. If code-protected memory is to be
© 2007 Microchip Technology Inc.
IHH
applied to the MCLR/
IHH
DD
to the MCLR pin.
of 4.5V to 5.5V.