PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 186

• Manufacturer Part Number: PIC18F2450-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2450-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/USB
• Maximum Clock Frequency: 48 MHZ
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 10
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2450/4450
16.8
An A/D conversion can be started by the Special Event
Trigger of the CCP1 module. This requires that the
CCP1M3:CCP1M0
programmed as ‘1011’ and that the A/D module is
enabled (ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D acquisition
and conversion, and the Timer1 counter will be reset to
zero. Timer1 is reset to automatically repeat the A/D
acquisition period with minimal software overhead
TABLE 16-2:
DS39760C-page 184
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
PORTA
TRISA
PORTB
TRISB
LATB
PORTE
TRISE
LATE
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1:
Name
(4)
2:
3:
4:
(4)
Use of the CCP1 Trigger
Implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0).
RA6 and its associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.
RE3 port bit is available only as an input pin when the MCLRE Configuration bit is ‘0’.
These registers and/or bits are not implemented on 28-pin devices.
GIE/GIEH PEIE/GIEL TMR0IE
A/D Result Register High Byte
A/D Result Register Low Byte
OSCFIF
OSCFIE
OSCFIP
TRISB7
LATB7
ADFM
Bit 7
RB7
—
—
—
—
—
—
—
—
—
—
REGISTERS ASSOCIATED WITH A/D OPERATION
bits
TRISA6
TRISB6
RA6
LATB6
ADIF
ADIE
ADIP
Bit 6
RB6
—
—
—
—
—
—
—
—
—
(CCP1CON<3:0>)
(2)
(2)
TRISA5
TRISB5
VCFG1
ACQT2
USBIF
USBIE
USBIP
LATB5
CHS3
RCIF
RCIE
RCIP
Bit 5
RA5
RB5
—
—
—
TRISA4
TRISB4
VCFG0
ACQT1
INT0IE
Preliminary
LATB4
CHS2
TXIE
TXIP
Bit 4
TXIF
be
RA4
RB4
—
—
—
—
—
—
RE3
TRISA3
TRISB3
PCFG3
ACQT0
LATB3
CHS1
(moving ADRESH:ADRESL to the desired location).
The appropriate analog input channel must be selected
and the minimum acquisition period is either timed by
the user, or an appropriate T
the Special Event Trigger sets the GO/DONE bit (starts
a conversion).
If the A/D module is not enabled (ADON is cleared), the
Special Event Trigger will be ignored by the A/D module
but will still reset the Timer1 counter.
RBIE
Bit 3
RA3
RB3
—
—
—
—
—
—
—
—
(1,3)
TRISE2
LATE2
TMR0IF
CCP1IF
CCP1IE
CCP1IP
HLVDIF
HLVDIE
HLVDIP
TRISA2
TRISB2
PCFG2
ADCS2
LATB2
RE2
CHS0
Bit 2
RA2
RB2
(4)
(4)
(4)
GO/DONE
TRISE1
LATE1
TMR2IF
TMR2IE
TMR2IP
TRISA1
TRISB1
PCFG1
ADCS1
INT0IF
LATB1
RE1
Bit 1
© 2007 Microchip Technology Inc.
RA1
RB1
—
—
—
(4)
(4)
ACQ
(4)
TRISE0
LATE0
time selected before
TMR1IF
TMR1IE
TMR1IP
TRISA0
TRISB0
PCFG0
ADCS0
ADON
LATB0
RE0
RBIF
Bit 0
RA0
RB0
—
—
—
(4)
(4)
(4)
on Page:
Values
Reset
49
51
51
51
51
51
51
50
50
50
50
50
51
51
51
51
51
51
51
51