PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 225

• Manufacturer Part Number: PIC18F2450-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2450-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/USB
• Maximum Clock Frequency: 48 MHZ
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 10
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

BNC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2007 Microchip Technology Inc.
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
No
PC
If Carry
If Carry
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Carry
BNC
-128 ≤ n ≤ 127
if Carry bit is ‘0’,
(PC) + 2 + 2n → PC
None
If the Carry bit is ‘0’, then the program
will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
‘n’
Q2
‘n’
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
0011
BNC
operation
Process
Process
Data
Data
No
Q3
Q3
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn
Preliminary
BNN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
No
PC
If Negative
If Negative
PIC18F2450/4450
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Negative
BNN
-128 ≤ n ≤ 127
if Negative bit is ‘0’,
(PC) + 2 + 2n → PC
None
If the Negative bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
‘n’
Q2
‘n’
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
0111
BNN
operation
Process
Process
Data
Data
No
Q3
Q3
DS39760C-page 223
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn