PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 144

IC PIC MCU FLASH 8KX16 28SOIC

PIC18F2450-I/SO

Manufacturer Part Number
PIC18F2450-I/SO
Description
IC PIC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2450-I/SO

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/USB
Maximum Clock Frequency
48 MHZ
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
A/d Bit Size
10 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2450-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2450/4450
TABLE 14-4:
TABLE 14-5:
DS39760C-page 142
Legend: (E) = EVEN transaction buffer, (O) = ODD transaction buffer
BDnSTAT
BDnCNT
BDnADRL
BDnADRH
Note 1:
Endpoint
Name
2:
3:
4:
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
(1)
(1)
(1)
(1)
For buffer descriptor registers, n may have a value of 0 to 63. For the sake of brevity, all 64 registers are
shown as one generic prototype. All registers have indeterminate Reset values (xxxx xxxx).
Bits 5 through 2 of the BDnSTAT register are used by the SIE to return PID3:PID0 values once the register
is turned over to the SIE (UOWN bit is set). Once the registers have been under SIE control, the values
written for DTSEN and BSTALL are no longer valid.
Prior to turning the buffer descriptor over to the SIE (UOWN bit is cleared), bits 3 and 2 of the BDnSTAT
register are used to configure the DTSEN and BSTALL settings.
This bit is ignored unless DTSEN = 1.
Byte Count
Buffer Address Low
Buffer Address High
ASSIGNMENT OF BUFFER DESCRIPTORS FOR THE DIFFERENT
BUFFERING MODES
SUMMARY OF USB BUFFER DESCRIPTOR TABLE REGISTERS
UOWN
Bit 7
Out
10
12
14
16
18
20
22
24
26
28
30
(No Ping-Pong)
0
2
4
6
8
Mode 0
DTS
Bit 6
(4)
13
15
17
19
21
23
25
27
29
31
11
In
1
3
5
7
9
PID3
Bit 5
0 (E), 1 (O)
(2)
(Ping-Pong on EP0 OUT)
Preliminary
Out
13
15
17
19
21
23
25
27
29
31
11
BDs Assigned to Endpoint
3
5
7
9
PID2
Bit 4
Mode 1
(2)
DTSEN
PID1
10
12
14
16
18
20
22
24
26
28
30
32
In
2
4
6
8
Bit 3
(2)
(3)
BSTALL
16 (E), 17 (O)
40 (E), 41 (O)
44 (E), 45 (O)
48 (E), 49 (O)
52 (E), 53 (O)
56 (E), 57 (O)
60 (E), 61 (O)
12 (E), 13 (O)
20 (E), 21 (O)
24 (E), 25 (O)
28 (E), 29 (O)
32 (E), 33 (O)
36 (E), 37 (O)
PID0
0 (E), 1 (O)
4 (E), 5 (O)
8 (E), 9 (O)
Bit 2
(Ping-Pong on all EPs)
Out
© 2007 Microchip Technology Inc.
(2)
(3)
Mode 2
Bit 1
BC9
14 (E), 15 (O)
18 (E), 19 (O)
22 (E), 23 (O)
26 (E), 27 (O)
34 (E), 35 (O)
38 (E), 39 (O)
42 (E), 43 (O)
46 (E), 47 (O)
50 (E), 51 (O)
54 (E), 55 (O)
58 (E), 59 (O)
62 (E), 63 (O)
10 (E), 11 (O)
30 (E), 31 (O)
2 (E), 3 (O)
6 (E), 7 (O)
In
Bit 0
BC8

Related parts for PIC18F2450-I/SO