PIC18F2450-I/SO Microchip Technology, PIC18F2450-I/SO Datasheet - Page 313

IC PIC MCU FLASH 8KX16 28SOIC

PIC18F2450-I/SO

Manufacturer Part Number
PIC18F2450-I/SO
Description
IC PIC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2450-I/SO

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
23
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/USB
Maximum Clock Frequency
48 MHZ
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
A/d Bit Size
10 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2450-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Extended Instruction Set .................................................. 255
External Clock Input ........................................................... 26
F
Fail-Safe Clock Monitor ............................................ 191, 206
Fast Register Stack ............................................................ 56
Firmware Instructions ....................................................... 213
Flash Program Memory ..................................................... 73
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 234
H
Hardware Multiplier ............................................................ 83
High/Low-Voltage Detect ................................................. 185
HLVD. See High/Low-Voltage Detect. ............................. 185
© 2007 Microchip Technology Inc.
ADDFSR .................................................................. 256
ADDULNK ................................................................ 256
CALLW ..................................................................... 257
Considerations for Use ............................................ 260
MOVSF .................................................................... 257
MOVSS .................................................................... 258
PUSHL ..................................................................... 258
SUBFSR .................................................................. 259
SUBULNK ................................................................ 259
Syntax ...................................................................... 255
Use with MPLAB IDE Tools ..................................... 262
Exiting Operation ..................................................... 206
Interrupts in Power-Managed Modes ....................... 207
POR or Wake-up From Sleep .................................. 207
WDT During Oscillator Failure ................................. 206
Associated Registers ................................................. 81
Control Registers ....................................................... 74
Erase Sequence ........................................................ 78
Erasing ....................................................................... 78
Operation During Code-Protect ................................. 81
Protection Against Spurious Writes ........................... 81
Reading ...................................................................... 77
Table Pointer
Table Pointer Boundaries .......................................... 76
Table Reads and Table Writes .................................. 73
Unexpected Termination of Write .............................. 81
Write Sequence ......................................................... 79
Write Verify ................................................................ 81
Writing To ................................................................... 79
Introduction ................................................................ 83
Operation ................................................................... 83
Performance Comparison .......................................... 83
Applications .............................................................. 188
Associated Registers ............................................... 189
Characteristics ......................................................... 282
Current Consumption ............................................... 187
Effects of a Reset ..................................................... 189
Operation ................................................................. 186
Setup ........................................................................ 187
Start-up Time ........................................................... 187
Typical Application ................................................... 188
EECON1 and EECON2 ..................................... 74
TABLAT (Table Latch) Register ......................... 76
TBLPTR (Table Pointer) Register ...................... 76
Boundaries Based on Operation ........................ 76
During Sleep .................................................... 189
Preliminary
I
I/O Ports ............................................................................ 99
ID Locations ............................................................. 191, 211
Idle Modes ......................................................................... 37
INCF ................................................................................ 234
INCFSZ ............................................................................ 235
In-Circuit Debugger .......................................................... 211
In-Circuit Serial Programming (ICSP) ...................... 191, 211
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 260
Indirect Addressing ............................................................ 68
INFSNZ ............................................................................ 235
Initialization Conditions for all Registers ...................... 49–52
Instruction Cycle ................................................................ 57
Instruction Set .................................................................. 213
and Standard PIC18 Instructions ............................. 260
Clocking Scheme ....................................................... 57
Flow/Pipelining .......................................................... 57
ADDLW .................................................................... 219
ADDWF ................................................................... 219
ADDWF (Indexed Literal Offset mode) .................... 261
ADDWFC ................................................................. 220
ANDLW .................................................................... 220
ANDWF ................................................................... 221
BC ............................................................................ 221
BCF ......................................................................... 222
BN ............................................................................ 222
BNC ......................................................................... 223
BNN ......................................................................... 223
BNOV ...................................................................... 224
BNZ ......................................................................... 224
BOV ......................................................................... 227
BRA ......................................................................... 225
BSF .......................................................................... 225
BSF (Indexed Literal Offset mode) .......................... 261
BTFSC ..................................................................... 226
BTFSS ..................................................................... 226
BTG ......................................................................... 227
BZ ............................................................................ 228
CALL ........................................................................ 228
CLRF ....................................................................... 229
CLRWDT ................................................................. 229
COMF ...................................................................... 230
CPFSEQ .................................................................. 230
CPFSGT .................................................................. 231
CPFSLT ................................................................... 231
DAW ........................................................................ 232
DCFSNZ .................................................................. 233
DECF ....................................................................... 232
DECFSZ .................................................................. 233
General Format ....................................................... 215
GOTO ...................................................................... 234
INCF ........................................................................ 234
INCFSZ .................................................................... 235
INFSNZ .................................................................... 235
IORLW ..................................................................... 236
IORWF ..................................................................... 236
LFSR ....................................................................... 237
MOVF ...................................................................... 237
MOVFF .................................................................... 238
MOVLB .................................................................... 238
MOVLW ................................................................... 239
MOVWF ................................................................... 239
PIC18F2450/4450
DS39760C-page 311

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