C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 56

DEV KIT FOR C8051F320/F321

C8051F320DK

Manufacturer Part Number
C8051F320DK
Description
DEV KIT FOR C8051F320/F321
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F320DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F320
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F320, C8051F321
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1260

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F320DK
Manufacturer:
SiliconL
Quantity:
4
C8051F320/1
Table 6.1. Voltage Reference Electrical Characteristics
V
56
Internal Reference (REFBE = 1)
Output Voltage
VREF Short-Circuit Current
VREF Temperature Coeffi-
cient
Load Regulation
VREF Turn-on Time 1
VREF Turn-on Time 2
VREF Turn-on Time 3
Power Supply Rejection
External Reference (REFBE = 0)
Input Voltage Range
Input Current
Bias Generators
ADC Bias Generator
Reference Bias Generator
DD
Bits7–3: UNUSED. Read = 00000b; Write = don’t care.
Bit3:
Bit2:
Bit1:
Bit0:
= 3.0 V; –40 to +85 °C unless otherwise specified.
R/W
Bit7
-
Parameter
REFSL: Voltage Reference Select.
This bit selects the source for the internal voltage reference.
0: VREF pin used as voltage reference.
1: VDD used as voltage reference.
TEMPE: Temperature Sensor Enable Bit.
0: Internal Temperature Sensor off.
1: Internal Temperature Sensor on.
BIASE: Internal Analog Bias Generator Enable Bit.
0: Internal Bias Generator off.
1: Internal Bias Generator on.
REFBE: Internal Reference Buffer Enable Bit.
0: Internal Reference Buffer disabled.
1: Internal Reference Buffer enabled. Internal voltage reference driven on the VREF pin.
R/W
Bit6
-
SFR Definition 6.1.
R/W
Bit5
-
4.7 µF tantalum, 0.1 µF ceramic bypass
Sample Rate = 200 ksps; VREF = 3.0 V
Load = 0 to 200 µA to GND
0.1 µF ceramic bypass
R/W
Bit4
-
no bypass cap
25 °C ambient
Conditions
BIASE = ‘1’
REF0CN: Reference Control
Rev. 1.4
REFSL
R/W
Bit3
TEMPE
R/W
Bit2
BIASE
2.38
Min
R/W
Bit1
0
2.44
Typ
140
106
1.5
15
20
10
12
42
REFBE
2
R/W
Bit0
VDD
Max
2.50
148
10
60
SFR Address:
00000000
Reset Value
0xD1
ppm/°C
ppm/µA
ppm/V
Units
mA
ms
µA
µA
µA
µs
µs
V
V

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