C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 35

DEV KIT FOR C8051F320/F321

C8051F320DK

Manufacturer Part Number
C8051F320DK
Description
DEV KIT FOR C8051F320/F321
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F320DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F320
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F320, C8051F321
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1260

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F320DK
Manufacturer:
SiliconL
Quantity:
4
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
Dimension
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
5. The stencil thickness should be 0.125mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all pads.
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
C1
C2
E
mask and the metal pad is to be 60m minimum, all the way around the pad.
to assure good solder paste release.
Body Components.
Figure 4.3. LQFP-32 Recommended PCB Land Pattern
Table 4.3. LQFP-32 PCB Land Pattern Dimensions
8.40
8.40
Min
0.80
Max
8.50
8.50
Rev. 1.4
Dimension
X1
Y1
0.40
1.25
Min
C8051F320/1
Max
0.50
1.35
35

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