STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 149

BOARD STLM75/STDS75/ST72F651

STEVAL-IFS003V1

Manufacturer Part Number
STEVAL-IFS003V1
Description
BOARD STLM75/STDS75/ST72F651
Manufacturer
STMicroelectronics

Specifications of STEVAL-IFS003V1

Design Resources
STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C
Voltage - Supply
7.5 V ~ 19 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F651, STDS75, STLM75
Silicon Manufacturer
ST Micro
Silicon Core Number
STLM75/STDS75 And ST72F651AR6
Kit Application Type
Sensing - Temperature
Application Sub Type
Temperature Sensor
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6238
8-BIT ADC CHARACTERISTICS (Cont’d)
ADC Accuracy
Figure 94. ADC Accuracy Characteristics
Notes:
1. ADC Accuracy vs. Negative Injection Current:
For I
for each 10KΩ increase of the external analog source impedance. This effect on the ADC accuracy has been observed
under worst-case conditions for injection:
- negative injection
- injection to an Input with analog capability, adjacent to the enabled Analog Input
- at 5V V
2. Data based on characterization results with T
3. Data based on characterization results over the whole temperature range, monitored in production.
Symbol
255
254
253
|E
|E
E
E
E
7
6
5
4
3
2
1
INJ-
G
D
T
0
L
0
V
|
|
SSA
=0.8mA, the typical leakage induced inside the die is 1.6µA and the effect on the ADC accuracy is a loss of 1 LSB
Digital Result ADCDR
DD
Offset Error
Gain Error
Differential linearity error
Integral linearity error
Total Unadjusted Error
1
1LSB
supply, and worst case temperature.
E
O
2
Parameter
IDEAL
3
1)
=
V
---------------------------------------- -
4
DDA
5
256
1 LSB
1)
V
1)
E
SSA
6
1)
T
IDEAL
E
7
L
Conditions ⇒
(2)
E
A
D
=25°C.
Doc ID 7215 Rev 4
253 254 255 256
(3)
(1)
E
G
V
f
CPU
DD
Min
-0.5
-2.0
V
DDA
=5.5V,
=1MHz
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
Max
T
O
G
D
L
2)
2.5
1.5
1.5
2.5
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
=Differential Linearity Error: maximum deviation
V
0
in
(LSB
V
f
CPU
IDEAL
DD
Min
-1.0
-2.0
=5.0V,
=8MHz
)
Max
3)
2.5
1.5
1.5
2.5
1)
0
ST72651AR6
V
f
CPU
DD
Min
-1.0
-2.0
=3.3V,
=8MHz
149/161
Max
3)
2.5
1.5
1.5
3.0
1)
0

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