STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 134

BOARD STLM75/STDS75/ST72F651

STEVAL-IFS003V1

Manufacturer Part Number
STEVAL-IFS003V1
Description
BOARD STLM75/STDS75/ST72F651
Manufacturer
STMicroelectronics

Specifications of STEVAL-IFS003V1

Design Resources
STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C
Voltage - Supply
7.5 V ~ 19 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F651, STDS75, STLM75
Silicon Manufacturer
ST Micro
Silicon Core Number
STLM75/STDS75 And ST72F651AR6
Kit Application Type
Sensing - Temperature
Application Sub Type
Temperature Sensor
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6238
ST72651AR6
EMC CHARACTERISTICS (Cont’d)
13.7.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on three different tests (ESD, LU and DLU)
using specific measurement methods, the product
is stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
Absolute Maximum Ratings
Notes:
1. Data based on characterization results, not tested in production.
13.7.3.2 Static Latchup
LU: 3 complementary static tests are required on
10 parts to assess the latchup performance. A
supply overvoltage (applied to each power supply
pin) and a current injection (applied to each input,
Electrical Sensitivities
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
134/161
V
Symbol
Symbol
ESD(HBM)
LU
Electrostatic discharge voltage
(Human Body Model)
Static latchup class
Parameter
Ratings
Doc ID 7215 Rev 4
T
T
A
A
=+25°C
=+25°C
13.7.3.1 Electrostatic Discharge (ESD)
Electrostatic Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). The Human Body Model is simulated.
This test conforms to the JESD22-A114A stand-
ard.
output and configurable I/O pin) are performed on
each sample. This test conforms to the EIA/JESD
78 IC latchup standard. For more details, refer to
the application note AN1181.
Conditions
Conditions
Maximum value
2000
Class
A
1)
1)
Unit
V

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