STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 137
STEVAL-IFS003V1
Manufacturer Part Number
STEVAL-IFS003V1
Description
BOARD STLM75/STDS75/ST72F651
Manufacturer
STMicroelectronics
Datasheets
1.STLM75DS2F.pdf
(40 pages)
2.STDS75M2F.pdf
(39 pages)
3.STEVAL-IFS003V1.pdf
(161 pages)
4.STEVAL-IFS003V1.pdf
(4 pages)
Specifications of STEVAL-IFS003V1
Design Resources
STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C
Voltage - Supply
7.5 V ~ 19 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F651, STDS75, STLM75
Silicon Manufacturer
ST Micro
Silicon Core Number
STLM75/STDS75 And ST72F651AR6
Kit Application Type
Sensing - Temperature
Application Sub Type
Temperature Sensor
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6238
- STLM75DS2F PDF datasheet
- STDS75M2F PDF datasheet #2
- STEVAL-IFS003V1 PDF datasheet #3
- STEVAL-IFS003V1 PDF datasheet #4
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- Download datasheet (3Mb)
I/O PORT PIN CHARACTERISTICS (Cont’d)
13.8.2 Output Driving Current
Subject to general operating conditions for V
Figure 79. Typical V
Figure 80Typical V
Notes:
1. The I
(I/O ports and control pins) must not exceed I
2. The I
I
IO
Symbol
V
V
(I/O ports and control pins) must not exceed I
OH
OL
1.2
0.8
0.6
0.4
0.2
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1
0
0
1)
2)
0
0
IO
IO
current sourced must always respect the absolute maximum rating specified in
current sunk must always respect the absolute maximum rating specified in
Output low level voltage for a standard I/O pin
when 8 pins are sunk at same time
(see
Output low level voltage for a high sink I/O pin
when 4 pins are sunk at same time
(see
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
(see
1
1
Figure 79
Figure 81
Figure 80
2
2
DD
OL
-V
3
3
-Ioh (mA)
and
and
and
at V
Iol (mA)
OH
Parameter
Figure
Figure
Figure
at V
DD
4
4
=5V (standard)
DD
82)
83)
84)
5
=5V
5
VSS
6
6
VDD
.
Doc ID 7215 Rev 4
DD
. True open drain I/O pins does not have V
7
, f
7
OSC
, and T
Figure 81. Typical V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
A
Conditions
0
unless otherwise specified.
I
I
I
I
I
I
IO
IO
IO
IO
IO
IO
5
=+5mA
=+2mA
=+20mA
=+8mA
=-5mA
=-2mA
10
Section 13.2.2
OL
Iol (mA)
V
V
Section 13.2.2
at V
DD
DD
Min
15
-1.4
-0.7
DD
OH
.
=5V (high-sink)
20
and the sum of I
Max
ST72651AR6
1.2
0.5
1.3
0.6
and the sum of
25
137/161
Unit
V
30
IO
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