ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 99

no-image

ADE5166_08

Manufacturer Part Number
ADE5166_08
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
FLASH MEMORY
FLASH MEMORY OVERVIEW
Flash memory is a type of nonvolatile memory that is in-circuit
programmable. The default, erased state of a byte of flash memory
is 0xFF. When a byte of flash memory is programmed, the required
bits change from 1 to 0. The flash memory must be erased to turn
the 0s back to 1s. A byte of flash memory cannot, however, be
erased individually. The entire segment, or page, of flash
memory that contains the byte must be erased.
The ADE5166/ADE5169 provide 62 bytes of flash program/
information memory. This memory is segmented into 124 pages
that each contain 512 bytes. To reprogram one byte of flash
memory, the 511 other bytes in that page must be erased. The
flash memory can be erased by page or all at once in a mass erase.
There is a command to verify that a flash write operation has
completed successfully. The ADE5166/ADE5169 flash memory
controller also offers configurable flash memory protection.
The 62 bytes of flash memory are provided on-chip to facilitate
code execution without any external discrete ROM device require-
ments. The program memory can be programmed in-circuit,
using the serial download mode provided or using conventional
third party memory programmers.
Flash/EE Memory Reliability
The flash memory arrays on the ADE5166/ADE5169 are fully
qualified for two key Flash/EE memory characteristics:
Flash/EE memory cycling endurance and Flash/EE memory
data retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of four independent,
sequential events, as follows:
1.
2.
3.
4.
In reliability qualification, every byte in both the program and
data Flash/EE memory is cycled from 0x00 to 0xFF until a first
fail is recorded, signifying the endurance limit of the on-chip
Flash/EE memory.
As indicated in Table 4, the ADE5166/ADE5169 flash memory
endurance qualification has been carried out in accordance with
JEDEC Standard 22 Method A117 over the industrial temperature
range of −40°C, +25°C, and +85°C. The results allow the specifica-
tion of a minimum endurance figure over supply and temperature
of 100,000 cycles, with a minimum endurance figure of 20,000
cycles of operation at 25°C.
Initial page erase sequence
Read/verify sequence
Byte program sequence
Second read/verify sequence
Rev. 0 | Page 99 of 148
Retention is the ability of the flash memory to retain its
programmed data over time. Again, the parts have been
qualified in accordance with the formal retention lifetime
specification, JEDEC Standard 22 Method A117, at a specific
junction temperature (T
procedure, the flash memory is cycled to its specified endurance
limit, as described previously, before data retention is charac-
terized. This means that the flash memory is guaranteed to retain
its data for its full specified retention lifetime every time the
flash memory is reprogrammed. It should also be noted that
retention lifetime, based on an activation energy of 0.6 eV,
derates with T
FLASH MEMORY ORGANIZATION
The ADE5166/ADE5169 contain a 64 kB array of Flash/EE
program memory. The upper 2 kB contain permanently embedded
firmware, allowing in-circuit serial download, serial debug, and
nonintrusive single-pin emulation. The 2 kB of embedded firm-
ware also contains essential coefficients that provide calibration
to peripherals such as the ADCs and reference. The embedded
firmware contained in the upper 2 kB of Flash/EE memory is
not accessible by the user.
KERNEL OR IN PARALLEL PROGRAMMING MODE.
PERMANENTLY EMBEDDED DOWNLOAD/DEBUG
PERMANENTLY EMBEDDED FIRMWARE ALLOWS
300
250
200
150
100
62 kB OF FLASH/EE PROGRAM MEMORY
50
62 kB OF ON-CHIP PROGRAM MEMORY.
CODE TO BE DOWNLOADED TO ANY OF THE
ARE AVAILABLE TO THE USER. ALL OF THIS
0
THE KERNEL PROGRAM APPEARS AS NOP
SPACE CAN BE PROGRAMMED FROM THE
EMBEDDED DOWNLOAD/DEBUG KERNEL
40
INSTRUCTIONS TO USER CODE.
Figure 87. Flash/EE Memory Data Retention
J
USER PROGRAM MEMORY
, as shown in Figure 87.
50
Figure 88. Flash Memory Organization
T
J
60
JUNCTION TEMPERATURE (°C)
J
= 55°C). As part of this qualification
ANALOG DEVICES
SPECIFICATION
100 YEARS MIN.
AT T
70
J
= 55 ° C
ADE5166/ADE5169
80
90
100
0×FFFF
0×F7FF
0×F800
0×0000
62kB
2kB
110

Related parts for ADE5166_08