ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 9
ADE5166_08
Manufacturer Part Number
ADE5166_08
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
1.ADE5166_08.pdf
(148 pages)
- Current page: 9 of 148
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TIMING SPECIFICATIONS
AC inputs during testing were driven at V
and at 0.45 V for Logic 0. Timing measurements were made at V
minimum for Logic 1 and at V
Figure 2.
Table 5. Clock Input (External Clock Driven XTAL1) Parameter
Parameter
t
t
t
t
t
1/t
1
Table 6. I
Parameter
t
t
t
t
t
t
t
t
t
t
t
1
CK
CKL
CKH
CKR
CKF
BUF
L
H
SHD
DSU
DHD
RSU
PSU
R
F
SUP
The ADE5166/ADE5169 internal PLL locks onto a multiple (512×) of the 32.768 kHz external crystal frequency to provide a stable 4.096 MHz internal clock for the
Input filtering on both the SCLK and SDATA inputs suppresses noise spikes of <50 ns.
system. The core can operate at this frequency or at a binary submultiple defined by the CD[2:0] bits of the POWCON SFR, Address 0xC5 (see Table 25).
CORE
1
2
SDATA (I/O)
C-Compatible Interface Timing Parameters (400 kHz)
SCLK (I)
V
t
PSU
SWOUT
– 0.5V
CONDITION
0.45V
Description
Bus-free time between stop condition and start condition
SCLK low pulse width
SCLK high pulse width
Start condition hold time
Data setup time
Data hold time
Setup time for repeated start
Stop condition setup time
Rise time of both SCLK and SDATA
Fall time of both SCLK and SDATA
Pulse width of spike suppressed
STOP
Description
XTAL1 period
XTAL1 width low
XTAL1 width high
XTAL1 rise time
XTAL1 fall time
Core clock frequency
PS
IL
t
BUF
maximum for Logic 0, as shown in
CONDITION
START
t
DSU
SWOUT
0.2V
0.2V
TEST POINTS
t
SHD
SWOUT
SWOUT
− 0.5 V for Logic 1
1
MSB
1
– 0.1V
+ 0.9V
Figure 2. Timing Waveform Characteristics
Figure 3. I
t
DHD
2 TO 7
2
C-Compatible Interface Timing
Rev. 0 | Page 9 of 148
IH
t
L
V
LOAD
Min
LSB
V
V
8
LOAD
LOAD
t
t
SUP
SUP
For timing purposes, a port pin is no longer floating when a
100 mV change from load voltage occurs. A port pin begins to
float when a 100 mV change from the loaded V
occurs, as shown in Figure 2.
C
to 3.6 V; all specifications T
LOAD
– 0.1V
+ 0.1V
t
H
t
DSU
for all outputs = 80 pF, unless otherwise noted. V
32.768 kHz External Crystal
ACK
REFERENCE
9
POINTS
TIMING
t
RSU
Typ
30.52
6.26
6.26
9
9
1.024
t
DHD
REPEATED
START
MIN
S(R)
to T
V
V
LOAD
LOAD
ADE5166/ADE5169
MAX
– 0.1V
– 0.1V
Max
Typ
1.3
1.36
1.14
251.35
740
400
12.5
400
200
300
50
, unless otherwise noted.
t
F
MSB
t
V
F
LOAD
1
t
R
t
R
OH
/V
DD
OL
Unit
μs
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
Unit
μs
μs
μs
ns
ns
MHz
level
= 2.7 V
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