ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 127

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

UART2 SERIAL INTERFACE
The ADE5166/ADE5169 UART2 is an 8-bit or 9-bit UART with
variable baud rate.
Variable baud rates are defined by using an internal timer to
generate any rate between 300 bauds/sec and 115,200 bauds/sec.
The UART2 serial interface provided in the ADE5166/ADE5169 is
a full-duplex serial interface. It is also receive buffered by storing
the first received byte in a receive buffer until the reception of
the second byte is complete. The physical interface to the UART
is provided via the RxD2 (P0.7/ SS /T1/RxD2) pin and the TxD2
( SDEN /P2.3/TxD2) pin, whereas the firmware interface is through
the SFRs presented in
UART2 SFRs
Table 145. Serial Port 2 SFRs
SFR
SCON2
SBUF2
SBAUD2
Table 146. Serial Communications Control SFR (SCON2, Address 0xE1)
Bit
7
6
5
4
3
2
1
0
Table 147. Serial Port 2 Buffer SFR (SBUF2, Address 0xEB)
Bit
[7:0]
Table 148. Enhanced Serial Baud Rate Control 2 SFR (SBAUD2, Address 0xEE)
Bit
7
6
5
[4:3]
Address
0xE1
0xEB
0xEE
Mnemonic
N/A
EN-T8
OWE2
FE2
BE2
REN2
TI2
RI2
Mnemonic
SBUF2
Mnemonic
TB8
RB9
SBF2
SBTH2
Table 145
Bit
Addressable
No
No
No
Default
N/A
0
0
0
0
0
0
0
Default
0
Default
0
0
0
.
Enhance serial baud rate control (see Table 148).
Reserved
9-bit UART, variable baud rate enable bit. When set, the UART2 is in 9-bit mode.
Overwrite error. This bit is set when new data is received and RI = 1 in the SCON SFR. It indicates
that SBUF2 was not read before the next character was transferred in, causing the prior SBUF2
data to be lost. Write a 0 to this bit to clear it.
Frame error. This bit is set when the received frame does not have a valid stop bit. This bit is read
only and updated every time a frame is received.
Break error. This bit is set whenever the receive data line (RxD2) is low for longer than a full
transmission frame, the time required for a start bit, eight data bits, a parity bit, and half a stop
bit. This bit is updated every time a frame is received.
Serial Port 2 receive enable bit. Set by user software to enable serial port reception. Cleared by
user software to disable serial port reception.
Serial Port 2 transmit interrupt flag. Set by hardware at the end of the eighth bit, TI2 must be
cleared by user software.
Serial Port 2 receive interrupt flag. Set by hardware at the end of the eighth bit, RI2 must be
cleared by user software.
Serial Port 2 data buffer.
Serial port transmit (Bit 9). The data loaded into TB8 is the ninth data bit transmitted in 9-bit mode.
Serial port receiver (Bit 9). The ninth data bit received in 9-bit mode is latched into RB8. For 8-bit
mode, the stop bit is latched into RB8.
Fractional divider Boolean: when set, SBAUDF2 = 0x2B when clear, SBAUDF2 = 0x07.
Extended divider ratio for baud rate setting (see Table 144).
Description
Serial communications control (see Table 146).
Serial Port 2 buffer (see Table 147).
Description
Description
Description
Rev. 0 | Page 127 of 148
Both the serial port receive and transmit registers are accessed
through the SBUF2 SFR (Address 0xEB). Writing to SBUF2
loads the transmit register, and reading SBUF2 accesses a
physically separate receive register.
An enhanced UART mode is offered by using the UART timer
and providing enhanced frame error, break error, and overwrite
error detection. The SBAUD2 SFR (Address 0xEE) is used to
configure the UART2 timer and to indicate the enhanced
UART2 errors.
ADE5166/ADE5169