ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 98

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

ADE5166/ADE5169
Charge Pump
Voltage generation through the charge pump requires external
capacitors to store charge. The external connections to LCDVA,
LCDVB, and LCDVC, as well as to LCDVP1 and LCDVP2, are
shown in Figure 85.
External Resistor Ladder
To enable the external resistor ladder option, set the EXTRES
bit (Bit 6) in the LCD Configuration X SFR (LCDCONX, Address
0x9C). When EXTRES = 1, the LCD waveform voltages are
supplied by the external resistor ladder. Because the LCD
voltages are not generated on-chip, the LCD bias compensation
implemented to maintain contrast over temperature and supply
is not possible.
The external circuitry needed for the resistor ladder option is
shown in Figure 86. The resistors required should be in the range
of 10 kΩ to 100 kΩ and should be based on the current required
by the LCD being used.
LCD FUNCTION IN PSM2
LCDPSM2 (Bit 4) and LCDEN (Bit 7) in the LCD configuration
SFR (LCDCON, Address 0x95) control the LCD functionality
in the PSM2 operating mode (see Table 102).
Note that the internal voltage reference must be enabled by set-
ting REF_BAT_EN (Bit 3) in the peripheral configuration SFR
(PERIPH, Address 0xF4) to allow LCD operation in PSM2 mode
(see Table 19).
Table 102. Bits Controlling LCD Functionality in PSM2 Mode
LCDPSM2
0
0
1
In addition, note that the LCD configuration and data memory
is retained when the display is turned off.
Example LCD Setup
An example of how to set up the LCD peripheral for a specific
LCD is described in this section with the following parameters:
LCD WAVEFORM
CHARGE PUMP
Figure 86. External Circuitry for External Resistor Ladder Option
CIRCUITRY
AND
Figure 85. External Circuitry for Charge Pump Option
LCD WAVEFORM
LCDEN
0
1
X
CIRCUITRY
LCDVP1
LCDVP2
LCDVC
LCDVB
LCDVA
Result
The display is off in PSM2.
The display is on in PSM2.
The display is off in PSM2.
100nF
LCDVP1
LCDVP2
LCDVC
LCDVB
LCDVA
470nF
470nF
470nF
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A 96-segment LCD with 4× multiplexing requires 96/4 = 24
segment lines. Sixteen pins, FP0 to FP15, are automatically
dedicated for use as LCD segments. Eight more pins must be
chosen for the LCD function. Because the LCD has 4× multi-
plexing, all four common lines are used. As a result, COM2/FP28
and COM3/FP27 cannot be used as segment lines. Based on the
alternate functions of the pins used for FP16 through FP25, FP16 to
FP23 are chosen for the eight remaining segment lines. These
pins are enabled for LCD functionality in the LCD segment
enable SFR (LCDSEGE, Address 0x97) and LCD Segment
Enable 2 SFR (LCDSEGE2, Address 0xED).
To determine contrast setting for this 5 V LCD, Table 92 shows
the BIASLVL[5:0] setting in the LCD Configuration X SFR
(LCDCONX, Address 0x9C) that corresponds to a V
1/3 bias mode. The maximum bias level setting for this LCD is
BIASLVL[5:0] = 101110.
The LCD is set up with the following 8052 code:
; set up LCD pins to have LCD functionality
MOV
MOV
; set up LCDCON for f
and 4x multiplexing
MOV
; set up LCDCONX for charge pump and
BIASLVL[110111]
MOV
ASLVL2+BIASLVL1+BIASLVL0
; set up refresh rate for 64Hz with f
2048 Hz
MOV
; set up LCD data registers with data to be
displayed using
; LCDPTR and LCDDATA registers
; turn all segments on FP27 ON
ORL
refresh
MOV
MOV
ANL
refresh
ORL
To set up the same 3.3 V LCD for use with an external resistor
ladder,
; setup LCDCONX for external resistor ladder
MOV
Type of LCD: 5 V, 4× multiplexed with 1/3 bias, 96 segment
Voltage generation: internal charge pump
Refresh rate: 64 Hz
LCDSEG,#FP20EN+FP21EN+FP22EN+FP23EN
LCDSEGX,#FP16EN+FP17EN+FP18EN+FP19EN
LCDCON,#BIAS+LMUX1+LMUX0
LCDCONX,#BIASLVL5+BIASLVL4+BIASLVL3+BI
LCDCLK,#FD3+FD2+FD1+FD0
LCDCONY,#01h ; start data memory
LCDDAT,#F0H
LCDCONY,#0FEh ; end of data memory
LCDCON,#LCDEN ; enable LCD
LCDCONX,#EXTRES
LCDPTR, #80h OR 0DH
LCDCLK
=2048Hz, 1/3 bias
C
LCDCLK
of 5 V in
=