ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 46

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

ADE5166/ADE5169
FAULT DETECTION
The ADE5166/ADE5169 incorporate a fault detection scheme
that warns of fault conditions and allows accurate measurement
to continue during a fault event. The ADE5166/ADE5169 do
this by continuously monitoring both current inputs (I
For ease of understanding, these currents are referred to as phase
and neutral (return) currents. In the ADE5166/ADE5169, a fault
condition is defined when the difference between I
greater than 6.25% of the active channel. If a fault condition is
detected and the inactive channel is larger than the active channel,
the ADE5166/ADE5169 automatically switch current measure-
ment to the inactive channel. During a fault, the active, reactive,
and apparent power and the I
the two currents. On power-up, I
for active, reactive, and apparent power and I
To prevent a false alarm, averaging is done for the fault detection,
and a fault condition is detected approximately one second after
the event. The fault detection is automatically disabled when the
voltage signal is less than 0.3% of the full-scale input range. This
eliminates false detection of a fault due to noise at light loads.
Because the ADE5166/ADE5169 look for a difference between
the voltage signals on I
transducers be closely matched.
Channel Selection Indication
The current channel selected for measurement is indicated by
Bit 7 (ICHANNEL) in the ACCMODE register (Address 0x0F).
When this bit is cleared, I
selected. The ADE5166/ADE5169 automatically switch from one
channel to the other and report the channel configuration in the
ACCMODE register.
The current channel selected for measurement can also be forced.
Setting the SEL_I_CH[5:4] bits in the CALMODE register
(Address 0x3D) selects I
are cleared or set, the current channel used for measurement is
selected automatically based on the fault detection.
Fault Indication
The ADE5166/ADE5169 provide an indication of the part going
in or out of a fault condition. The new fault condition is indicated
by the FAULTSIGN flag (Bit 5) in the Interrupt Status 1 SFR
(MIRQSTL, Address 0xDC).
When the FAULTSIGN bit (Bit 6) of the ACCMODE register
(Address 0x0F) is cleared, the FAULTSIGN flag in the Interrupt
Status 1 SFR (MIRQSTL, Address 0xDC) is set when the part is
entering a fault condition or a normal condition.
When the FAULTSIGN bit (Bit 5) is set in the Interrupt Enable 1
SFR (MIRQENL, Address 0xD9), and the FAULTSIGN flag
(Bit 5) in the Interrupt Status 1 SFR (MIRQSTL, Address 0xDC)
is set, the 8052 core has a pending ADE interrupt.
PA
and I
PA
PA
and I
is selected and, when it is set, I
PB
rms
, it is important that both current
PB
are generated using the larger of
PA
, respectively. When both bits
is the current input selected
RMS
calculations.
PA
PA
and I
and I
PB
PB
PB
is
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).
is
Fault with Active Input Greater Than Inactive Input
If I
and the voltage signal on I
of I
(Address 0x0F) is cleared, the FAULTSIGN flag (Bit 5) in the
Interrupt Status 1 SFR (MIRQSTL, Address 0xDC) is set. Both
analog inputs are filtered and averaged to prevent false
triggering of this logic output. As a consequence of the filtering,
there is a time delay of approximately 3 sec on the logic output
after the fault event. The FAULTSIGN flag is independent of
any activity. Because I
than I
input occurs. I
Fault with Inactive Input Greater Than Active Input
If the difference between I
input (that is, being used for billing), becomes greater than 6.25%
of IPB, and the FAULTSIGN bit (Bit 6) of the ACCMODE register
(Address 0x0F) is cleared, the FAULTSIGN flag (Bit 5)in the
Interrupt Status 1 SFR (MIRQSTL, Address 0xDC) is set. The
I
of about 3 sec is associated with this swap. I
to the active channel until I
between I
I
register (Address 0x0F) is set, the FAULTSIGN flag (Bit 5) in the
Interrupt Status 1 SFR (MIRQSTL, Address 0xDC) is set as soon
as I
about potential chatter between I
Typically, when a meter is calibrated, the voltage and current
circuits are separated, as shown in Figure 45. Current passes
through only the phase circuit or the neutral circuit. Figure 45
shows current being passed through the phase circuit. This is the
preferred option because the ADE5166/ADE5169 start billing on
the I
I
matched, it is important to match current inputs. The ADE5166/
ADE5169 provide a gain calibration register for I
(Address 0x1C). IBGAIN is a 12-bit, signed, twos complement
register that provides a gain resolution of 0.0244%/LSB.
PB
PB
PA
. However, if the FAULTSIGN bit (Bit 6) of the ACCMODE
Figure 45. Fault Conditions for Inactive Input Greater Than Active Input
CURRENT
PA
analog input becomes the active input. Again, a time constant
in the diagram. Because the current sensors are not perfectly
PA
PA
PA
, and the FAULTSIGN bit (Bit 6) of the ACCMODE register
is the active current input (that is, being used for billing),
is within 6.25% of I
PB
TEST
input on power-up. The phase circuit CT is connected to
, billing is maintained on I
PA
and I
I
PB
240V rms
PA
PB
V
remains the active input.
, in this order, becomes greater than 6.25% of
AGND
R
0
A
PA
R
F
is the active input and it is still greater
PB
PB
CT
CT
PA
PB
, the inactive input, and I
. This threshold eliminates concerns
is greater than I
(inactive input) falls below 93.75%
R
R
C
PA
B
B
F
and I
PA
0V
; that is, no swap to the I
V
A
R
C
R
R
F
T
PB
F
F
calibration.
V
V
PA
N
P
PB
does not swap back
C
C
and the difference
F
F
I
I
I
N
B
PA
PB
PA
, IBGAIN
, the active
PB