ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 48

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ADE5166_08

Manufacturer Part Number
ADE5166_08
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
ADE5166/ADE5169
Note that the integrator has a −20 dB/dec attenuation and an
approximately −90° phase shift. When combined with a di/dt
sensor, the resulting magnitude and phase response should be
a flat gain over the frequency band of interest. The di/dt sensor
has a 20 dB/dec gain associated with it. It also generates significant
high frequency noise. Therefore, a more effective antialiasing
filter is needed to avoid noise due to aliasing (see the Antialiasing
Filter section).
When the digital integrator is switched off, the ADE5169 can be
used directly with a conventional current sensor, such as a current
transformer (CT), or with a low resistance current shunt.
POWER QUALITY MEASUREMENTS
Zero-Crossing Detection
Each ADE5166/ADE5169 has a zero-crossing detection circuit
on the voltage channel. This external zero-crossing signal can be
output on P0.5 and P1.2 (see Table 38). It is also used in calibra-
tion mode.
The zero crossing is generated by default from the output of LPF1.
This filter has a low cutoff frequency and is intended for 50 Hz
and 60 Hz systems. If needed, this filter can be disabled to allow
a higher frequency signal to be detected or to limit the group delay
of the detection. If the voltage input fundamental frequency is
below 60 Hz, and a time delay in ZX detection is acceptable, it
is recommended that LPF1 be enabled. Enabling LPF1 limits the
variability in the ZX detection by eliminating the high frequency
components. Figure 51 shows how the zero-crossing signal is
generated.
The zero-crossing signal, ZX, is generated from the output of
LPF1 (bypassed or not). LPF1 has a single pole at 63.7 Hz (at
MCLK = 4.096 MHz). As a result, there is a phase lag between
Figure 50. Combined Phase Response of the Digital Integrator and
–89.70
–89.75
–89.80
–89.85
–89.90
–89.95
–90.00
–90.05
40
Phase Compensator (40 Hz to 70 Hz)
45
50
FREQUENCY (Hz)
55
60
65
70
Rev. 0 | Page 48 of
the analog input signal V2 and the output of LPF1. The phase
lag response of LPF1 results in a time delay of approximately
2 ms (@ 60 Hz) between the zero crossing on the analog inputs
of the voltage channel and ZX detection.
The zero-crossing detection also drives the ZX flag in the
Interrupt Status 3 SFR (MIRQSTH, Address 0xDE). If the ZX
bit in the Interrupt Enable 3 SFR (MIRQENH, Address 0xDB)
is set, the 8052 core has a pending ADE interrupt. The ADE
interrupt stays active until the ZX status bit is cleared (see the
Energy Measurement Interrupts section).
Zero-Crossing Timeout
The zero-crossing detection also has an associated timeout
register, ZXTOUT. This unsigned, 12-bit register is decremented
(1 LSB) every 160/MCLK seconds. The register is reset to its
user programmed, full-scale value every time a zero crossing is
detected on the voltage channel. The default power-on value in
this register is 0xFFF. If the internal register decrements to 0
before a zero crossing is detected in the Interrupt Status 3 SFR
(MIRQSTH, Address 0xDE), and the ZXTO bit (Bit 1) in the
Interrupt Enable 3 SFR (MIRQENH, Address 0xDB) is set, the
8052 core has a pending ADE interrupt.
The ADE interrupt stays active until the ZXTO status bit is
cleared (see the Energy Measurement Interrupts section). The
ZXTOUT register (Address 0x11) can be written to or read by
the user (see the Energy Measurement Registers section). The
resolution of the register is 160/MCLK seconds per LSB. Thus,
the maximum delay for an interrupt is 0.16 seconds (1/MCLK ×
2
12
V2
148
) when MCLK = 4.096 MHz.
V
V
N
P
Figure 51. Zero-Crossing Detection on the Voltage Channel
PGA2
×1, ×2, ×4,
×8, ×16
0.73
{GAIN[7:5]}
1.0
V2
REFERENCE
43.24° @ 60Hz
ADC 2
LPF1
f
MODE1[6]
–3dB
HPF
LPF1
= 63.7Hz
ZX
CROSSING
ZERO
ZX

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