DS26518GNB1+ Maxim Integrated Products, DS26518GNB1+ Datasheet - Page 237

• Manufacturer Part Number: DS26518GNB1+
• Description: IC TXRX T1/E1/J1 8PRT 256-CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Transceiverr

Specifications of DS26518GNB1+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 256-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 7 to 0: Transmit Channels 1 to 32 Channel Blocking Control Bits (CH[1:32]).
* Note that TCBR4 has two functions:
Register Name:
Register Description:
Register Address:
Bit #
Name
Bits 7 to 0: Transmit Hardware-Signaling Channel Select for Channels 1 to 32 (CH[1:32]). These bits
determine which channels have signaling data inserted from the TSIGn pin into the TSERn PCM data.
* Note that THSCS4 is only used in 2.048MHz backplane applications.
1 = Source signaling data from the TSIGn pin for this channel.
0 = Force the TCHBLKn pin to remain low during this channel time.
1 = Force the TCHBLKn pin high during this channel time.
When 2.048MHz backplane mode is selected, this register allows the user to enable the channel blocking
signal for any of the 32 possible backplane channels.
When 1.544MHz backplane mode is selected, the LSB of this register determines whether or not the
TCHBLKn signal will pulse high during the F-bit time:
In this mode TCBR4.1 to TCBR4.7 should be set to 0.
0 = Do not source signaling data from the TSIGn pin for this channel.
(MSB)
(MSB)
CH16
CH24
CH32
CH16
CH24
CH32
CH8
CH8
7
7
TCBR4.0 = 0, do not pulse TCHBLKn during the F-bit.
TCBR4.0 = 1, pulse TCHBLKn during the F-bit.
CH15
CH23
CH31
CH15
CH23
CH31
CH7
CH7
TCBR1, TCBR2, TCBR3, TCBR4
Transmit Channel Blocking Registers 1 to 4
1C4h, 1C5h, 1C6h, 1C7h + (200h x (n - 1)) : where n = 1 to 8
THSCS1, THSCS2, THSCS3, THSCS4
Transmit Hardware-Signaling Channel Select Registers 1 to 4
1C8h, 1C9h, 1CAh, 1CBh + (200h x (n - 1)) : where n = 1 to 8
6
6
CH14
CH22
CH30
CH14
CH22
CH30
CH6
CH6
5
5
CH13
CH21
CH29
CH13
CH21
CH29
CH5
CH5
4
4
237 of 312
CH12
CH20
CH28
CH12
CH20
CH28
CH4
CH4
3
3
CH11
CH19
CH27
CH11
CH19
CH27
CH3
CH3
2
2
CH10
CH18
CH26
CH2
CH10
CH18
CH26
CH2
1
1
(F-bit)
(LSB)
CH17
CH25
CH1
CH9
(LSB)
CH17
CH25
CH1
CH9
0
0
TCBR1
TCBR2
TCBR3
TCBR4 (E1
Mode Only)*
THSCS1
THSCS2
THSCS3
THSCS4
(E1 Mode
Only)*