BBT3821-JH Intersil, BBT3821-JH Datasheet - Page 33

no-image

BBT3821-JH

Manufacturer Part Number
BBT3821-JH
Description
IC RE-TIMER OCTAL 192-BGA
Manufacturer
Intersil
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of BBT3821-JH

Input
Differential
Output
CML
Frequency - Max
3.1875GHz
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
192-EBGA
Frequency-max
3.1875GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BBT3821-JH
Manufacturer:
INTERSIL
Quantity:
140
Part Number:
BBT3821-JH
Manufacturer:
Intersil
Quantity:
10 000
Part Number:
BBT3821-JH
Manufacturer:
INTERSIL
Quantity:
10 000
Note (1): These 1-byte register values are merely copied by the BBT3821 from the I
Note (1): User writes to these bits are not valid unless the Command Status is Idle. The Command Status will not return to Idle until being read after command
Note (2): At the end of a hardware RESETN or a register 1.0.15 RESET operation, if the XP_ENA pin is asserted, and the DOM control bits are set in 1.32890 (1.807A),
Note (3): The rates of the periodic reads are determined by bits 4:3 of register 1.49176 (1.C018’h), see Table 51.
VENDOR-SPECIFIC PMA/PMD AND GPIO REGISTERS (1.C001’H TO 1.C01D’H)
Note (1): These values may be overwritten by the Auto-Configure operation (See “Auto-Configuring Control Registers” on page 16 and Table 92 for details).
Note (2): Internal test purposes only.
Note (3): Default values depend on setting of LX4/CX4 select LX4_MODE pin. LX4 value is shown firs
Note (4): Optimum value to meet output templates. Contact BitBlitz for recommended value.
1.41076.3
1.41076.2
1.41076.1
1.41076.0
1.41077.15:8
1.41077.7
1.41077.6
1.41077.5:0
1.41216.15:4
1.41216.3:2
1.41216.1:0
1.49153.15
1.49153.14
1.49153.13
1.49153.12:11
1.49153.10:8
1.49153.7:0
BIT
BIT
DOM Enable’ bit (Register bit 1.C018’h.2 Table 51) is not set, a four-lane external DOM device is expected to determine the values for these registers, according
Section 11.3 in the XENPAK MSA Rev 3.0 specification. A single one-lane DOM device system will provide the values from the single DOM device here. If the
‘Indirect DOM Enable’ bit is set, the values from the “Representative” (as defined by Register bits 1.C018’h.1:0 in Table 51), lane DOM are entered here.
completion (either Succeed or Failed).
the BBT3821 will automatically begin a ‘Periodic update, fastest rate read’ operation.
BIT
LBC_High
LBC_Low
LOP_High
LOP_Low
Reserved
ROP_High
ROP_Low
Reserved
Reserved
DOM
Command
Status
DOM
Command
Type
PMA DC_O_DIS
Test
Amplitude adjust
Reserved
PMA_LOS_TH
Reserved
NAME
NAME
(1)
(1)
NAME
33
Table 38. XENPAK DOM OPERATION CONTROL AND STATUS REGISTER
Table 37. XENPAK DOM WARNING FLAGS REGISTER (Continued)
1 = Warning Set
0 = Warning Not Set
1 = Warning Set
0 = Warn. Not Set
Current Status of DOM
Command
NVR operation to be
performed
MDIO REGISTER, ADDRESS = 1.41076:7 (1.A074:5’h)
SETTING
SETTING
MDIO REGISTER, ADDRESS = 1.41216 (1.A100’h)
MDIO REGISTER, ADDRESS = 1.49153 (1.C001’h)
1 = Disable, 0 = normal
0 = normal
0’h = 160mV
1’h = 240mV
2’h = 200mV
3’h = 120mV
4’h = 80mV
else = 160mV
Table 39. PMA CONTROL 2 REGISTER
SETTING
p-p
p-p
p-p
p-p
p-p
p-p
0’b
00’h
00’h
0’b
0’b
0’b
0’b
0’b
0000’h
00’b
11’b
DEFAULT
BBT3821
DEFAULT
(2)
2
C address space on Power-up or RESET, or on any DOM read operation. If the ‘Indirect
0’b
0’b
1,0’h
0’h
LX4:
CX4:
03’h
00’h
RO
R/W
RO
RO
RO
RO
RO
RO
R/W
DEFAULT
(1)
(2) (1)
R/W
(1)
(1) (3)
(3)
0’h,
11 = Command failed
10 = Command in progress/Queued
01 = Command complete w success
00 = Idle
00 = Single DOM Read operation
01 = Periodic update, slowest rate
10 = Periodic update, intermediate rate
11 = Periodic update, fastest rate
t.
Laser Bias Current High Warning
Laser Bias Current Low Warning
Laser Output Power High Warning
Laser Output Power Low Warning
Receive Optical Power High Warning
Receive Optical Power Low Warning
R/W
R/W
R/W
R/W
R/W
PMA DC Offset Disable
User must keep at 0.
Optimizing Setting, TBD
Set the threshold voltage for the Loss Of
Signal (LOS) detection circuit in
PMA/PMD. Nominal levels are listed for
each control value. Note that the
differential peak-to-peak value is twice that
listed.
DESCRIPTION
DESCRIPTION
DESCRIPTION
(3)
(3)
(1)
(3)
(4)

Related parts for BBT3821-JH