BBT3821-JH Intersil, BBT3821-JH Datasheet - Page 25

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BBT3821-JH

Manufacturer Part Number
BBT3821-JH
Description
IC RE-TIMER OCTAL 192-BGA
Manufacturer
Intersil
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of BBT3821-JH

Input
Differential
Output
CML
Frequency - Max
3.1875GHz
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
192-EBGA
Frequency-max
3.1875GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Note (1): This bit should only be set if an I
Note (2): Block 256-byte NVR writes will not occur unless the WRTP pin is set Low. NVR Write Page Size controls Page size for Block operations only.
Note (3): This area corresponds to the XENPAK-defined Customer Area; see XENPAK Spec R3.0 Section 10.12.22. Writes will be performed one byte at a time.
Note (4): The I
Note (1): These bits are latched high on any internal error condition detected. They are reset low (cleared) on being read.
Note (2): These bits are set if the EXOR sum calculated from the indicated range is not the same as the value read into the listed checksum register. Note that this is
1.32772.15:8
1.32772.7:0
1.32773.15:9
1.32773.8
1.32773.7
1.32773.6:4
1.32773.3:2
1.32773.1:0
1.32774.15
1.32774.14:4
1.32774.3
1.32774.2
1.32774.1
1.32774.0
BIT
these areas, this bit should be 0’b.
clock will actually be 156.25/1.6kHz, just over 97.5kHz. See also the notes to Table 117.
NOT the same as the XENPAK-defined checksum calculation. Contact Intersil for a method of reconciling these two checksum calculations.
BIT
BIT
2
C clock speeds listed are approximate. They are derived by division from the CMU, locked to the RFCP/N inputs. At 156.25MHz, the nominal 100kHz
Reserved
Write Data
Reserved
Long Memory
NVR Write Size
I
NVR ACK Error
Count
NVR Write Page
Size
XP_ENA
Reserved
Vendor Specific
Area EXOR sum check
Customer Write Area
EXOR sum check
Reserved
NVR Area EXOR sum
check
2
C Bus Speed
NAME
(2)
NAME
NAME
25
(1)
2
C device which needs a 16-bit address is to be addressed. The NVR and DOM spaces are all 8-bit address sections, and for
I
Table 19. I
2
C Write Data
1 =16 bit
0 = 8 bit
Speed of I
clock
from REF_CLOCK)
11 = 63
10 = 16
01 = 4
00 = 1
11 = 32 bytes
10 = 16 bytes
01 = 8 bytes
00 = 4 byte
Table 20. NVR I
SETTING
Table 21. NVR I
(4)
MDIO REGISTER ADDRESS = 1.32773 (1.8005’h)
SETTING
MDIO REGISTER ADDRESS = 1.32774 (1.8006’h)
MDIO Register Address = 1.32772 (1.8004’h)
XP_ENA pin
Error Flag
Error Flag
Error Flag
(derived
2
C ONE-BYTE OPERATION WRITE DATA REGISTER
2
C SCL
SETTING
2
00’h
00’h
C OPERATION CONTROL REGISTER
2
DEFAULT
C OPERATION STATUS REGISTER
0’b
00’h
0’b
100’b
11’b
01’b
BBT3821
DEFAULT
0000’h
0’b
0’b
0’b
0’b
DEFAULT
RO
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
Data to be written by 1-byte Write Operation
RO
RO
RO LH
RO LH
RO
LH
RO LH
R/W
(1)
Length of address for I
1 = Block write all 256 bytes to NVR
0 = Write only 1.807F:AE’h to NVR
111 = 400kHz
110 = 200kHz
101 = 150kHz
100 = 100kHz
Number of ACK failures at any address before I
Operation failure is reported
The I
STOP and wait for the EEPROM every time after this
number of bytes are sent out
1 = XP_ENA pin high, 0 = low
1 = 1.8106 ! =
0 = 1.8106 =
1 = 1.80AD ! =
0 = 1.80AD =
1 = 1.807D ! =
0 = 1.807D =
2
C interface block write operation will issue a
DESCRIPTION
EXOR
EXOR
DESCRIPTION
EXOR
EXOR
EXOR
EXOR
DESCRIPTION
2
C device selected
(1.80AE:8105)
(1.8007:807C)
(1.807E:80AC)
(1.80AE:8105)
(1.8007:807C)
(1.807E:80AC)
011 = 40kHz
010 = 20kHz
001 = 10kHz
000 = 4kHz
(3)
(2)
(2)
(2)
(2)
2
C

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