82P2282PF IDT, Integrated Device Technology Inc, 82P2282PF Datasheet - Page 358

• Manufacturer Part Number: 82P2282PF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82P2282PF

• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

Table 82: IR Code
IDT82P2282
6.1
ISTER (IR)
to select the test to be executed or the data register to be accessed or
both.
IEEE STD 1149.1 JTAG Test Access Port
IR Code
0 0 0
0 1 0
0 0 1
1 1 1
0 1 1
0 1 0
1 0 1
The IR (Instruction Register) with instruction decode block is used
JTAG INSTRUCTIONS AND INSTRUCTION REG-
Instruction
PRELOAD
SAMPLE /
EXTEST
IDCODE
BYPASS
CLAMP
HIGHZ
-
The external test instruction allows testing of the interconnection to other devices. When the current instruction is the EXTEST instruction,
the boundary scan register is placed between TDI and TDO. The signal on the input pins can be sampled by loading the boundary scan
register using the Capture-DR state. The sampled values can then be viewed by shifting the boundary scan register using the Shift-DR
state. The signal on the output pins can be controlled by loading patterns shifted in through input TDI into the boundary scan register using
the Update-DR state.
The sample/preload instruction is used to allow scanning of the boundary-scan register without causing interference to the normal opera-
tion of the on-chip system logic. Data received at system input pins is supplied without modification to the on-chip system logic; data from
the on-chip system logic is driven without modification through the system output pins. SAMPLE allows a snapshot to be taken of the data
flowing from the system pins to the on-chip system logic or vice versa, without interfering with the normal operation of the assembled
board. PRELOAD allows an initial data pattern to be placed at the latched parallel outputs of boundary-scan register cells prior to selection
of another boundary-scan test operation.
The identification instruction is used to connect the identification register between TDI and TDO. The device’s identification code can then
be shifted out using the Shift-DR state.
The BYPASS instruction shifts data from input TDI to output TDO with one TCK clock period delay. The instruction is used to bypass the
device.
This instruction allows the state of the signals driven from device pins to be determined from the boundary-scan register while the bypass
register is selected as the serial path between TDI and TDO. The signals driven from the device pins will not change while the CLAMP
instruction is selected.
Use of the HIGHZ instruction places the device in a state in which all of its system logic outputs are placed in an inactive drive state (e.g.,
high impedance). In this state, and in-circuit test system may drive signals onto the connections normally driven by a device output without
incurring the risk of damage to the device.
(for IC manufactory test)
358
Table 82 for details of the codes and the instructions related.
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Comment
The instructions are shifted in LSB first to this 3-bit register. See
August 20, 2009