MT48H8M16LFB4-75:K Micron Technology Inc, MT48H8M16LFB4-75:K Datasheet - Page 8

• Manufacturer Part Number: MT48H8M16LFB4-75:K
• Description: DRAM Chip Mobile SDRAM 128M-Bit 8Mx16 1.8V 54-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr
• Series: -r

Specifications of MT48H8M16LFB4-75:K

• Package: 54VFBGA
• Density: 128 Mb
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 8|5.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 132MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 54-VFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

General Description
PDF: 09005aef832ff1ea
128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN
The 128Mb Mobile LPSDR is a high-speed CMOS, dynamic random access memory con-
taining 134,217,728 bits. It is internally configured as a quad-bank DRAM with a synchro-
nous interface (all signals are registered on the positive edge of the clock signal, CLK).
Each of the x16’s 33,554,432-bit banks is organized as 4096 rows by 512 columns by 16
bits. Each of the x32’s 33,554,432-bit banks is organized as 4096 rows by 256 columns by
32 bits.
Mobile LPSDR devices offer substantial advances in DRAM operating performance, in-
cluding the ability to synchronously burst data at a high data rate with automatic column-
address generation, the ability to interleave between internal banks to hide precharge
time, and the capability to randomly change column addresses on each clock cycle dur-
ing a burst access.
Note:
1. Throughout the data sheet, various figures and text refer to DQs as DQ. DQ should be
interpreted as any and all DQ collectively, unless specifically stated otherwise. Addition-
ally, the x16 is divided into two bytes: the lower byte and the upper byte. For the lower
byte (DQ[7:0]), DQM refers to LDQM. For the upper byte (DQ[15:8]), DQM refers to
UDQM. The x32 is divided into four bytes. For DQ[7:0], DQM refers to DQM0. For
DQ[15:8], DQM refers to DQM1. For DQ[23:16], DQM refers to DQM2, and for
DQ[31:24], DQM refers to DQM3.
2. Complete functionality is described throughout the document; any page or diagram
may have been simplified to convey a topic and may not be inclusive of all requirements.
3. Any specific requirement takes precedence over a general statement.
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
General Description
©2008 Micron Technology, Inc. All rights reserved.