MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 81

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.3.2.1
2.3.2.1.1
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
If a TIM-channel is defined as output, the related port T is assigned to IOC function.
In addition to the possible timer functionality of port T pins PWM channels can be routed to port T. For
this the Module Routing Register (MODRR) needs to be configured.
Freescale Semiconductor
Module Base + 0x0000
Reset
PWM
TIM
W
R
PTT7
IOC7
Port T Registers
0
7
Port T I/O Register (PTT)
1. All fields in the that are not shaded are standard use cases.
2. TIMEN[x] means that the timer is enabled (TSCR1[7]), the related channel is
= Unimplemented or Reserved
MODRR[x]
configured for output compare function (TIOS[x] or special output on a timer
overflow event — configurable in TTOV[x]) and the timer output is routed to the
port pin (TCTL1/TCTL2).
PTT6
IOC6
Table 2-3. Port T[4:0] Pin Functionality Configurations
0
0
0
0
1
1
1
1
0
6
Figure 2-3. Port T I/O Register (PTT)
PWME[x]
PTT5
MC9S12C-Family / MC9S12GC-Family
IOC5
0
5
0
0
1
1
0
0
1
1
PWM4
PTT4
IOC4
TIMEN[x]
Rev 01.24
0
4
(2)
0
1
0
1
0
1
0
1
Chapter 2 Port Integration Module (PIM9C32) Block Description
PWM3
PTT3
IOC3
0
3
General Purpose I/O
General Purpose I/O
General Purpose I/O
Port T[x] Output
Timer
Timer
Timer
PWM
PWM
PWM2
PTT2
IOC2
0
2
(1)
PWM1
PTT1
IOC1
0
1
PWM0
PTT0
IOC0
0
0
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