MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 539

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.2
The
19.3
This section describes the
19.3.1
The
the Flash array addresses between
pages. The content of the HCS12 Core PPAGE register is used to map the logical
Freescale Semiconductor
FTS128K1FTS64K
FTS128K1FTS64K
Command
Interrupt
Command
Complete
Interrupt
Buffer Empty
Oscillator
Clock
External Signal Description
Memory Map and Registers
Module Memory Map
memory map is shown in
module contains no signals that connect off-chip.
FTS128K1FTS64K
FTS64K
Clock
Divider
Command Pipeline
cmd2
addr2
data2
0x40000x4000
Figure 19-2. FTS64K Block Diagram
MC9S12C-Family / MC9S12GC-Family
Interface
Registers
Protection
Security
Flash
FCLK
memory map and registers.
cmd1
addr1
data1
Rev 01.24
Figure 19-3Figure
and
0xFFFF, which corresponds to three 16 Kbyte
Chapter 19 64 Kbyte Flash Module (S12FTS64KV4)
19-4. The HCS12 architecture places
32K * 16 Bits
Flash Array
sector 63
sector 0
sector 1
middle
page ranging from
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