MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 414

• Manufacturer Part Number: MC9S12C64CFUE
• Description: IC MCU 64K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|5 V
• Height: 2.4 mm
• Length: 14 mm
• Supply Voltage (max): 2.75 V, 5.5 V
• Supply Voltage (min): 2.35 V, 2.97 V
• Width: 14 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 14 Serial Peripheral Interface (SPIV3) Block Description
14.1.3
Figure 14-1
data registers, shifter logic, baud rate generator, master/slave control logic, and port control logic.
14.2
This section lists the name and description of all ports including inputs and outputs that do, or may, connect
off chip. The SPIV3 module has a total of four external pins.
14.2.1
This pin is used to transmit data out of the SPI module when it is configured as a master and receive data
when it is configured as slave.
414
Bus Clock
Interrupt
Request
SPI
External Signal Description
Block Diagram
MOSI — Master Out/Slave In Pin
gives an overview on the SPI architecture. The main parts of the SPI are status, control, and
SPPR
SPI
SPI Baud Rate Register
Prescaler
SPI Control Register 1
SPI Control Register 2
Baud Rate Generator
SPI Status Register
SPI Data Register
Interrupt Control
SPIF
3
SPR
Clock Select
MODF
Counter
3
SPTEF
MC9S12C-Family / MC9S12GC-Family
Figure 14-1. SPI Block Diagram
Baud Rate
LSBFE=1
LSBFE=0
8
8
Control
Control
Master
Slave
Master Baud Rate
Rev 01.24
Slave Baud Rate
MSB
2
2
Shifter
LSBFE=1
LSBFE=0
LSBFE=0
LSBFE=1
CPOL
Clock
Shift
Phase +
Polarity
Control
Phase +
Polarity
Control
LSB
CPHA
Sample
Clock
BIDIROE
SPC0
data out
SCK in
SCK out
data in
Control
Logic
Freescale Semiconductor
Port
MOSI
SCK
SS