MC9S12C64CFUE Freescale Semiconductor, MC9S12C64CFUE Datasheet - Page 234

IC MCU 64K FLASH 4K RAM 80-QFP

MC9S12C64CFUE

Manufacturer Part Number
MC9S12C64CFUE
Description
IC MCU 64K FLASH 4K RAM 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C64CFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
25 MHz
Operating Supply Voltage
2.5|5 V
Height
2.4 mm
Length
14 mm
Supply Voltage (max)
2.75 V, 5.5 V
Supply Voltage (min)
2.35 V, 2.97 V
Width
14 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.5
This register selects the conversion clock frequency, the length of the second phase of the sample time and
the resolution of the A/D conversion (i.e.: 8-bits or 10-bits). Writes to this register will abort current
conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
234
Module Base + 0x0004
SMP[1:0]
PRS[4:0}
SRES8
Reset
Field
6–5
4–0
7
W
R
SRES8
A/D Resolution Select — This bit selects the resolution of A/D conversion results as either 8 or 10 bits. The A/D
converter has an accuracy of 10 bits; however, if low resolution is required, the conversion can be speeded up
by selecting 8-bit resolution.
0 10-bit resolution
1 8-bit resolution
Sample Time Select — These two bits select the length of the second phase of the sample time in units of ATD
conversion clock cycles. Note that the ATD conversion clock period is itself a function of the prescaler value (bits
PRS4-0). The sample time consists of two phases. The first phase is two ATD conversion clock cycles long and
transfers the sample quickly (via the buffer amplifier) onto the A/D machine’s storage node. The second phase
attaches the external analog signal directly to the storage node for final charging and high accuracy.
lists the lengths available for the second sample phase.
ATD Clock Prescaler — These 5 bits are the binary value prescaler value PRS. The ATD conversion clock
frequency is calculated as follows:
Note: The maximum ATD conversion clock frequency is half the Bus Clock. The default (after reset) prescaler
ATD Control Register 4 (ATDCTL4)
0
7
value is 5 which results in a default ATD conversion clock frequency that is Bus Clock divided by 12.
Table 8-8
ATDclock
SMP1
0
0
1
1
SMP1
0
6
illustrates the divide-by operation and the appropriate range of the Bus Clock.
=
Figure 8-7. ATD Control Register 4 (ATDCTL4)
[
----------------------------- -
BusClock
[
PRS
Table 8-6. ATDCTL4 Field Descriptions
SMP0
SMP0
MC9S12C-Family / MC9S12GC-Family
+
0
1
0
1
Table 8-7. Sample Time Select
0
1
5
]
]
×
0.5
PRS4
Rev 01.24
0
4
Length of 2nd Phase of Sample Time
Description
16 A/D conversion clock periods
2 A/D conversion clock periods
4 A/D conversion clock periods
8 A/D conversion clock periods
PRS3
0
3
PRS2
1
2
Freescale Semiconductor
PRS1
0
1
Table 8-7
PRS0
1
0

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