ATTINY24A-PU Atmel, ATTINY24A-PU Datasheet - Page 66

• Manufacturer Part Number: ATTINY24A-PU
• Description: MCU AVR 2K FLASH 20MHZ 14PDIP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY24A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-DIP (0.300", 7.62mm)
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 20 Channel
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 20
• Height: 5.33 mm
• Length: 19.68 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 7.11 mm
• For Use With: ATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3
10.3.1
10.3.2
10.3.3
66
Register Description
ATtiny24A/44A/84A
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
Table 10-9.
1.
2.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 54
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Bit
0x1A (0x3A)
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.
EXT_CLOCK = external clock is selected as system clock.
PB1/XTAL2/PCINT9
EXT_OSC
0
EXT_OSC
0
EXT_OSC
0
0
EXT_OSC
PCINT9 • PCIE1
EXT_OSC
PCINT9 Input
XTAL2
PORTA7
BODS
Overriding Signals for Alternate Functions in PB[1:0]
DDA7
R/W
R/W
R/W
7
0
7
0
7
0
(1)
(1)
(1)
(1)
(1)
PORTA6
+
• PCINT9 • PCIE1
DDA6
PUD
R/W
R/W
R/W
6
0
6
0
6
0
for more details about this feature.
PORTA5
DDA5
R/W
R/W
R/W
5
0
5
0
SE
5
0
PORTA4
DDA4
R/W
R/W
4
0
4
0
SM1
R/W
4
0
PB0/XTAL1/PCINT8
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
(PCINT8 • PCIE1)
( EXT_CLOCK
(EXT_CLOCK
XTAL1
0
CLOCK/PCINT8 Input
PORTA3
DDA3
R/W
R/W
3
0
3
0
SM0
R/W
3
0
(2)
(2)
(2)
(2)
(2)
(2)
PORTA2
DDA2
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
BODSE
R/W
R/W
• EXT_OSC
• PWR_DOWN ) +
2
0
2
0
R/W
2
0
PORTA1
DDA1
R/W
ISC01
R/W
R/W
1
0
1
0
(1)
(1)
(1)
(1)
1
0
(1)
+
• PCINT8 • PCIE1)
PORTA0
DDA0
ISC00
R/W
R/W
R/W
0
0
0
0
0
0
8183C–AVR–03/11
MCUCR
PORTA
DDRA
“Con-