ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 96

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ST92F150-EVAL

Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Datasheets

Specifications of ST92F150-EVAL

Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905

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0
ST92F124/F150/F250 - INTERRUPTS
ARBITRATION MODES (Cont’d)
Examples
In the following two examples, three interrupt re-
quests with different priority levels (2, 3 & 4) occur
simultaneously during the interrupt 5 service rou-
tine.
Figure 46. Simple Example of a Sequence of Interrupt Requests with:
- Concurrent mode selected and
- IEN unchanged by the interrupt routines
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9
0
1
2
3
4
5
6
7
CPL is set to 7
Priority Level of
Interrupt Request
MAIN
INT 5
ei
CPL = 7
INT 5
INT 2
INT 3
INT 4
CPL = 7
INT 2
CPL = 7
INT 3
CPL = 7
Example 1
In the first example, (simplest case,
ei instruction is not used within the interrupt serv-
ice routines. This means that no new interrupt can
be serviced in the middle of the current one. The
interrupt routines will thus be serviced one after
another, in the order of their priority, until the main
program eventually resumes.
INT 4
CPL = 7
MAIN
INTERRUPT 2 HAS PRIORITY LEVEL 2
INTERRUPT 3 HAS PRIORITY LEVEL 3
INTERRUPT 4 HAS PRIORITY LEVEL 4
INTERRUPT 5 HAS PRIORITY LEVEL 5
Figure
46) the

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