ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 214
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ST92F150-EVAL
Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Specifications of ST92F150-EVAL
Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905
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MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
10.5.4 SCI-M Operating Modes
10.5.4.1 Asynchronous Mode
In this mode, data and clock can be asynchronous
(the transmitter and receiver can use their own
clocks to sample received data), each data bit is
sampled 16 times per clock period.
The baud rate clock should be set to the ÷16 Mode
and the frequency of the input clock (from an ex-
ternal source or from the internal baud-rate gener-
ator output) is set to suit.
Figure 108. Sampling Times in Asynchronous Format
214/429
9
SDIN
rcvck
rxclk
LEGEND:
SIN:
rcvck:
rxd:
rxclk:
rxd
Serial Data Input line
Internal X16 Receiver Clock
Internal Serial Data Input Line
Internal Receiver Shift Register Sampling Clock
0
1
2
3
4
5
10.5.4.2
Synchronous Clock
In this mode, data and clock are synchronous,
each data bit is sampled once per clock period.
For transmit operation, a general purpose I/O port
pin can be programmed to output the CLKOUT
signal from the baud rate generator. If the SCI is
provided with an external transmission clock
source, there will be a skew equivalent to two
INTCLK periods between clock and data.
Data will be transmitted on the falling edge of the
transmit clock. Received data will be latched into
the SCI on the rising edge of the receive clock.
7
8
9
Asynchronous
10
11
12
13
14
Mode
15
VR001409
with
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