ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 331
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ST92F150-EVAL
Manufacturer Part Number
ST92F150-EVAL
Description
BOARD EVALUATION FOR ST9 SERIES
Manufacturer
STMicroelectronics
Specifications of ST92F150-EVAL
Processor To Be Evaluated
ST90158 and ST92F1x Daughter Board
Interface Type
I2C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2905
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CONTROLLER AREA NETWORK (Cont’d)
10.10.5.2
Mode
In this mode, the internal counter of the CAN hard-
ware is activated and used to generate the Time
Stamp value stored in the MTSRH and MTSRL
registers. The internal counter is captured on the
sample point of the Start Of Frame bit in both re-
ception and transmission.
10.10.5.3 Reception Handling
For the reception of CAN messages, three
mailboxes organized as a FIFO are provided. In
order to save CPU load, simplify the software and
guarantee data consistency, the FIFO is managed
Time
Triggered
Communication
CONTROLLER AREA NETWORK (bxCAN)
completely by hardware. The application accesses
the messages stored in the FIFO through the FIFO
output mailbox.
Valid Message
A received message is considered as valid when it
has been received correctly according to the CAN
protocol (no error until the last but one bit of the
EOF field) and It passed through the identifier fil-
tering successfully, see
er
Filtering.
Section 10.10.5.4 Identifi-
331/429
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