ST92F150-EVAL STMicroelectronics, ST92F150-EVAL Datasheet - Page 384

• Manufacturer Part Number: ST92F150-EVAL
• Description: BOARD EVALUATION FOR ST9 SERIES
• Manufacturer: STMicroelectronics

Specifications of ST92F150-EVAL

• Processor To Be Evaluated: ST90158 and ST92F1x Daughter Board
• Interface Type: I2C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2905

ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
EXTERNAL INTERRUPT TIMING TABLE
(V
Note:
The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period.
The value in the right hand two columns shows the timing minimum and maximum for an internal clock at 24MHz (INTCLK).
Measurement points are V
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
EXTERNAL INTERRUPT TIMING
WAKE-UP MANAGEMENT TIMING TABLE
(V
Note: The value in the left hand column shows the formula used to calculate the timing minimum or maximum from the oscillator clock period.
The value in the right hand two columns show the timing minimum and maximum for an internal clock at 24MHz (INTCLK).
The given data are related to Wake-up Management Unit used in External Interrupt mode.
Measurement points are V
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
WAKE-UP MANAGEMENT TIMING
384/429
1
N°
N°
WKUPn
INTn
1
2
3
4
1
2
3
4
n = 0-7
n = 0
DD
DD
TwWKPLR
TwWKPHR
TwWKPHF
TwWKPLF
TwINTLR
TwINTHR
TwINTHF
TwINTLF
= 5V ± 10%, T
= 5V ± 10%, T
-
15
Symbol
Symbol
Rising Edge Detection
Rising Edge Detection
2 x Crystal Oscillator Clock period when CLOCK1 7is divided by 2;
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
Low Level Minimum Pulse Width in Rising Edge Mode
High Level Minimum Pulse Width in Rising Edge Mode
High Level Minimum Pulse Width in Falling Edge Mode
Low Level Minimum Pulse Width in Falling Edge Mode
Low Level Minimum Pulse Width in Rising Edge Mode
High Level Minimum Pulse Width in Rising Edge Mode
High Level Minimum Pulse Width in Falling Edge Mode
Low Level Minimum Pulse Width in Falling Edge Mode
A
A
IH
IH
=
for positive pulses and V
=
for positive pulses and V
–
–
40°C to +125°C, C
40°C to +125°C, C
Parameter
Parameter
IL
IL
for negative pulses.
for negative pulses.
Load
Load
= 50pF, f
= 50pF, f
INTCLK
INTCLK
= 24MHz, unless otherwise specified)
= 24MHz, unless otherwise specified)
Falling Edge Detection
Falling Edge Detection
Formula
≥Tck+10
≥Tck+10
≥Tck+10
≥Tck+10
Formula
≥Tck+10
≥Tck+10
≥Tck+10
≥Tck+10
Value
Value
Min
Min
50
50
50
50
50
50
50
50
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns